DSP-MCQ
1) Which operations are performed by the bit manipulating instructions of boolean processor? a. Complement bit
b. Set bit
c. Clear bit
d. All of the above
Answer
All of the above ation
ANSW
2) Which data memory control and handle the operation of several peripherals by assigning them in th category of special function registers?
a. Internal on-chip RAM
b. External off-chip RAM
c. Both a & b
d. None of the above
Answer
Internal on-chip RAM ation
ANSW
3) Why is the speed accessibility of external data memory slower than internal on-chip RAM?
a. Due to multiplexing of lower order byte of address-data bus
b. Due to multiplexing of higher order byte of address-data bus
c. Due to demultiplexing of lower order byte of address-data bus
d. Due to demultiplexing of higher order byte of address-data bus
Answer
ANSW Due to multiplexing of lower order byte of address-data bus
:
4) Which control signal/s is/are generated by timing and control unit of 8051 microcontroller in order to the off-chip devices apart from the internal timings? a. ALE
b. PSEN
c. RD & WR
d. All of the above
Answer
All of the above ation
ANSW
5) Which register usually store the output generated by ALU in several arithmetic and logical operation a. Accumulator
b. Special Function Register
c. Timer Register
d. Stack Pointer
Answer
ANSW Accumulator
:
6) Why is CHMOS technology preferred over HMOS technology for designing the devices of MCS-51 fa a. Due to higher noise immunity
b. Due to lower power consumption
c. Due to higher speed
d. All of the above
Answer
ANSW
All of the above ation:
lanation is available for this question!
7) Which condition approve to prefer the EPROM/ROM versions for mass production in order to preven external memory connections?
a. size of code < size of on-chip program memory
b. size of code > size of on-chip program memory
c. size of code = size of on-chip program memory
d. None of the above
Answer
size of code < size of on-chip program memory ation
ANSW
8) Which among the below mentioned devices of MCS-51 family does not possess two 16 -bit timers/co a. 8031
b. 8052
c. 8751
d. All of the above
Answer
ANSW 8052
:
9) Which characteristic/s of accumulator is /are of greater significance in terms of its functionality?
a. Ability to store one of the operands before the execution of an instruction
b. Ability to store the result after the execution of an instruction c. Both a & b
d. None of the above
Answer
Both a & b ation
ANSW
10) Which general purpose register holds eight bit divisor and store the remainder especially after the execution of division operation?
a. A-Register
b. B-Register
c. Registers R0 through R7
d. All of the above
Answer
B-Register ation
ANSW
11) How many registers can be utilized to write the programs by an effective selection of register bank program status word (PSW)?
a. 8
b. 16
c. 32
d. 64
Answer
ANSW 32
:
12) Which operations are performed by stack pointer during its incremental phase? a. Push
b. Pop
c. Return
d. All of the above
Answer
Push ation
ANSW
13) Which is the only register without internal on-chip RAM address in MCS-51? a. Stack Pointer
b. Program Counter
c. Data Pointer
d. Timer Register
Answer
Program Counter ation
ANSW
14) What kind of instructions usually affect the program counter? a. Call & Jump
b. Call & Return
c. Push & Pop
d. Return & Jump
Answer
ANSW Call & Jump
:
15) What is the default value of stack once after the system undergoes the reset condition? a. 07H
b. 08H
c. 09H
d. 00H
Answer
07H ation
ANSW
16) Which bit/s play/s a significant role in the selection of a bank register of Program Status Word (PSW a. RS1
b. RS0
c. Both a & b
d. None of the above
Answer
ANSW Both a & b
:
17) Which flags represent the least significant bit (LSB) and most significant bit (MSB) of Program Stat (PSW) respectively?
a. Parity Flag & Carry Flag
b. Parity Flag & Auxiliary Carry Flag
c. Carry Flag & Overflow Flag
d. Carry Flag & Auxiliary Carry Flag
Answer
ANSW
ation:
Parity Flag & Carry Flag
lanation is available for this question!
18) Which register bank is supposed to get selected if the values of register bank select bits RS1 & Rs0 detected to be '1' & '0' respectively?
a. Bank 0
b. Bank 1
c. Bank 2
d. Bank 3
Answer
Bank 2 ation
ANSW
19) It is possible to set the auxiliary carry flag while performing addition or subtraction operations only the carry exceeds _______
a. 1st bit
b. 2nd bit
c. 3rd bit
d. 4th bit
Answer
ANSW 3rd bit
:
20) Which locations of 128 bytes on-chip additional RAM are generally reserved for special functions?
a. 80H to 0FFH
b. 70H to 0FFH
c. 90H to 0FFH
d. 60H to 0FFH
Answer
80H to 0FFH ation
ANSW
21) Which commands are used for addressing the off-chip data and associated codes respectively by d pointer?
a. MOVX & MOVC
b. MOVY & MOVB
c. MOVZ & MOVA
d. MOVC & MOVY
Answer
MOVX & MOVC ation
ANSW
22) Which instruction find its utility in loading the data pointer with 16 bits immediate data? a. MOV
b. INC
c. DEC
d. ADDC
Answer
ANSW MOV
:
23) What is the maximum capability of addressing the off-chip data memory & off-chip program memor data pointer?
a. 8K
b. 16K
c. 32K
d. 64K
Answer
64K ation
ANSW
24) Which among the below stated registers does not belong to the category of special function registe a. TCON & TMOD
b. TH0 & TL0
c. P0 & P1
d. SP & PC
Answer
SP & PC ation
ANSW
25) Which timer is attributed to the register pair of RCAP2H & RCAP2L for capture mode operation? a. Timer 0
b. Timer 1
c. Timer 2
d. Timer 3
Answer
ANSW Timer 2
:
26) Which registers are supposed to get copied into RCAP2H & RCAP2L respectively due to the transit 8052 T2EX pin in the capture mode operation?
a. TH0 & TH1
b. TH1 & TH1
c. TH2 & TH2
d. All of the above
Answer
TH2 & TH2 ation
ANSW
27) Which mode of timer 2 allow to hold the reload values with an assistance of RCAP2H & RCAP2L reg pair?
a. 8 bit auto-reload mode
b. 16 bit auto reload mode
c. 8 bit capture mode
d. 16 bit capture mode
Answer
16 bit auto reload mode ation
ANSW
28) Where should the pin 19 (XTAL1), acting as an input of inverting amplifier as well as part of an osci circuit, be connected under the application of external clock? a. to XTAL2
b. to Vcc
c. to GND
d. to ALE
Answer
ANSW to GND
:
29) Which port does not represent quasi-bidirectional nature of I/O ports in accordance to the pin confi of 8051 microcontroller?
a. Port 0 (Pins 32-39)
b. Port 1 (Pins 1-8)
c. Port 2 (Pins 21-28)
d. Port 3 (Pins 10-17)
Answer
Port 0 (Pins 32-39) ation
ANSW
30) What is the required baud rate for an efficient operation of serial port devices in 8051 microcontroll a. 1200
b. 2400
c. 4800
d. 9600
Answer
ANSW 9600
:
1) Which among the below mentioned functions does not belong to the category of alternate functions performed by Port 3 (Pins 10-17)?
a. External Interrupts
b. Internal Interrupts
c. Serial Ports
d. Read / Write Control signals
Answer
Internal Interrupts ation
ANSW
2) What is the constant activation rate of ALE that is optimized periodically in terms of an oscillator fre a. 1 / 8
b. 1 / 6
c. 1 / 4
d. 1 / 2
Answer
1 / 6 ation
ANSW
3) Which output control signal is activated after every six oscillator periods while fetching the external program memory and almost remains high during internal program execution? a. ALE
b. PSEN
c. EA
d. All of the above
Answer
PSEN
ANSWER:
:
4) Which memory allow the execution of instructions till the address limit of 0FFFH especially when the External Access (EA) pin is held high?
a. Internal Program Memory
b. External Program Memory
c. Both a & b
d. None of the above
Answer
Internal Program Memory ation
ANSW
5) Which value of disc capacitors is preferred or recommended especially when the quartz crystal is co externally in an oscillator circuit of 8051?
a. 10 pF
b. 20 pF
c. 30 pF
d. 40 pF
Answer
ANSW 30 pF
:
6) Why are the resonators not preferred for an oscillator circuit of 8051?
a. Because they do not avail for 12 MHz higher order frequencies
b. Because they are unstable as compared to quartz crystals
c. Because cost reduction due to its utility is almost negligible in comparison to total cost of microcontroller boar d. All of the above
Answer
ANSW
All of the above ation:
lanation is available for this question!
7) Which version of MCS-51 requires the necessary connection of external clock source to XTAL2 in ad to the XTAL1 connectivity to ground level?
a. HMOS
b. CHMOS
c. CMOS
d. All of the above
Answer
HMOS ation
ANSW
8) Which signal from CPU has an ability to respond the clocking value of D- flipflop (bit latch) from the bus?
a. Write-to-Read Signal
b. Write-to-Latch Signal
c. Read-to-Write Signal
d. Read-to-Latch Signal
Answer
ANSW Write-to-Latch Signal
:
9) Which among the below mentioned statements are precisely related to quasi-bidirectional port?
a. Fixed high pull-up resistors are internally connected
b. Configuration in the form of input pulls the port at higher position whereas they get pulled lower whe configured as a source current
c. It is possible to drive the pin as output at any duration when FET gets turned OFF for an input functio
d. Upper pull-up FET is always OFF with the provision of 'open-drain' output pin for normal operation of a. A, B, C, D
b. A, B & C
c. A & B
d. C & D
Answer
A, B & C ation
ANSW
10) What happens when the pins of port 0 & port 2 are switched to internal ADDR and ADDR / DATA bu respectively while accessing an external memory?
a. Ports cannot be used as general-purpose Inputs/Outputs
b. Ports start sinking more current than sourcing
c. Ports cannot be further used as high impedance input
d. All of the above
Answer
Ports cannot be used as general-purpose Inputs/Outputs ation
ANSW
11) The upper 128 bytes of an internal data memory from 80H through FFH usually represent _______. a. general-purpose registers
b. special function registers
c. stack pointers
d. program counters
Answer
ANSW special function registers :
12) What is the bit addressing range of addressable individual bits over the on-chip RAM? a. 00H to FFH
b. 01H to 7FH
c. 00H to 7FH
d. 80H to FFH
Answer
00H to 7FH ation
ANSW
13) What is the divisional range of program memory for internal and external memory portions respect when enable access pin is held high (unity)?
a. 0000H - 0FFFH & 1000H - FFFFH
b. 0000H - 1000H & 0FFFH - FFFFH
c. 0001H - 0FFFH & 01FFH - FFFFH
d. None of the above
Answer
ANSW 0000H - 0FFFH & 1000H - FFFFH
:
14) Consider the following statements. Which of them is/are correct in case of program execution relat program memory?
a. External Program memory execution takes place from 1000H through 0FFFFH only when the status of
is high (1)
b. External Program memory execution takes place from 0000H through 0FFFH only when the status of low (0)
c. Internal Program execution occurs from 0000H through 0FFFH only when the status of EA pin is held
d. Internal program memory execution occurs from 0000H through 0FFFH only when EA pin is held higha. A & C
b. B & D
c. A & B
d. Only A
Answer
B & D ation
ANSW
15) How does the processor respond to an occurrence of the interrupt? a. By Interrupt Service Subroutine
b. By Interrupt Status Subroutine
c. By Interrupt Structure Subroutine
d. By Interrupt System Subroutine
Answer
By Interrupt Service Subroutine ation
ANSW
16) Which address/location in the program memory is supposed to get occupied when CPU jump and e instantaneously during the occurrence of an interrupt? a. Scalar
b. Vector
c. Register
d. All of the above
Answer
ANSW Vector :
17) Which location specify the storage/loading of vector address during the interrupt generation? a. Stack Pointer
b. Program Counter
c. Data Pointer
d. All of the above
Answer
Program Counter ation
ANSW
18) Match the following :
a. ISS ----------------------------- 1. Monitors the status of interrupt pin
b. IER ----------------------------- 2. Allows the termination of ISS
c. RETI --------------------------- 3. MCS-51 Interrupts Initialization
d. INTO -------------------------- 4. Occurrence of high to low transition level a. A-1, B-2, C-3, D-4
b. A-3, B-2, C-4, D-1
c. A-1, B-3, C-2, D-4
d. A-4, B-3, C-2, D-1
Answer
-1, B-3, C-2, D-4
ANSW A
:
19) What kind of triggering configuration of external interrupt intimate the signal to stay low until the generation of subsequent interrupt?
a. Edge-Triggering
b. Level Triggering
c. Both a & b
d. None of the above
Answer
Level Triggering ation
ANSW
20) Which among the below mentioned reasons is/are responsible for the generation of Serial Port Inte
a. Overflow of timer/counter 1
b. High to low transition on pin INT1
c. High to low transition on pin INT0
d. Setting of either TI or RI flag
a. A & B
b. Only B
c. C & D
d. Only D
Answer
ANSW Only D
:
21) What is the counting rate of a machine cycle in correlation to the oscillator frequency for timers? a. 1 / 10
b. 1 / 12
c. 1 / 15
d. 1 / 20
Answer
1 / 12 ation
ANSW
22) Which special function register play a vital role in the timer/counter mode selection process by allo the bits in it?
a. TMOD
b. TCON
c. SCON
d. PCON
Answer
TMOD ation
ANSW
23) How many machine cycle/s is/are executed by the counters in 8051 in order to detect '1' to '0' trans the external pin?
a. One
b. Two
c. Four
d. Eight
Answer
ANSW Two
:
24) Which bit must be set in TCON register in order to start the 'Timer 0' while operating in 'Mode 0'? a. TR0
b. TF0
c. IT0
d. IE0
Answer
TR0 ation
ANSW
25) Which among the following control/s the timer1 especially when it is configured as a timer in mode where gate and TR1 bits are attributed to be '1” in TMOD register? a. TR1
b. External input at (INT1)
c. TF1
d. All of the above
Answer
External input at (INT1) ation
ANSW
26) Which timer mode exhibit the necessity to generate the interrupt by setting EA bit in IE enhancing t program counter to jump to another vector location? a. Mode 0
b. Mode 1
c. Mode 2
d. Mode 3
Answer
ANSW Mode 1
:
27) Consider the below generated program segment for initializing Timer 1 in Mode 1 operation :
MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SET C ET1
SETC TR0
SJMP $
Which among the below mentioned program segments represent the correct code? a. MOV SP, # 54 H
MOV TCON ,# 0010 0000 C
SETC ET1
SETC TR0
SJMP $
b. MOV SP, # 54H
MOV TMOD ,# 0010 0000 C
SETC ET0
SETC TR0
SJMP $
c. MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SETC ET1
SETC TR1
SETC EA
SJMP $
d. MOV SP, # 54 H
MOV TMOD ,# 0010 0000 C
SETC ET0
SETC TR1
SETC EA
SJMP $
Answer
MOV SP, # 54 H
TMOD ,# 0010 0000 C
ET1
TR1 EA
$ ation
ANSW
MOV
SETC SETC
SETC
SJMP
28) What is the maximum delay generated by the 12 MHz clock frequency in accordance to an automode (Mode 2) operation of the timer?
a. 125 μs
b. 250 μs
c. 256 μs
d. 1200 μs
Answer
ANSW 256 μs
:
29) Which among the below mentioned sequence of program instructions represent the correct chrono order for the generation of 2kHz square wave frequency?
1. MOV TMOD, 0000 0010 B
2. MOV TL0, # 06H
3. MOV TH0, # 06H
relo
4. SETB TR0
5. CPL p1.0
6. ORG 0000H
a. 6, 5, 2, 4, 1, 3
b. 6, 1, 3, 2, 4, 5
c. 6, 5, 4, 3, 2, 1
d. 6, 2, 4, 5, 1, 3
Answer
6, 1, 3, 2, 4, 5 ation
ANSW
30) Why is it not necessary to specify the baud rate to be equal to the number of bits per second?
a. Because each bit is preceded by a start bit & followed by one stop bit
b. Because each byte is preceded by a start byte & followed by one stop byte
c. Because each byte is preceded by a start bit & followed by one stop bit
d. Because each bit is preceded by a start byte &followed by one stop byte
Answer
ANSW Because each byte is preceded by a start bit & followed by one stop bit
:
1) Which factor/s is/are supposed to have the equal values at both phases of transmission and receptio with an intimation of error-free serial communication?
a. Baud Rate
b. Number of data bits & stop bits
c. Status of Parity bits
d. All of the above
Answer
All of the above ation
ANSW
2) Which bits exhibit and signify the termination phase of the character transmission and reception in S special function register?
a. Control bits
b. Status bits
c. Both a & b
d. None of the above
Answer
Status bits ation
ANSW
3) Which two bits are supposed to be analyzed/tested for unity value (1) in SCON for the reception of b mode 1 serial communication?
a. RI & TI
b. REN & RB8
c. RI & REN
d. TI & RB8
Answer
ANSW RI & REN
:
4) What is the bit transmitting or receiving capability of mode 1 in serial communication? a. 8 bits
b. 10 bits
c. 11 bits
d. 12 bits
Answer
10 bits ation
ANSW
5) Which pin in the shift register mode (Mode 0) of serial communication allow the data transmission a reception?
a. TXD
b. RXD
c. RB8
d. REN
Answer
RXD ation: anation is available for this question!
ANSW
No expl
6) How is the baud rate determined on the basis of system clock frequency (fsc) in accordance to mode serial communication?
a. (oscillator frequency) / 12
b. [2SMOD / 32] x (oscillator frequency) / [12 x (256 – (TH1)]
c. [2SMOD / 64] x (oscillator frequency)
d. 2SMOD/ 32 x (Timer 1 overflow rate)
Answer ANSW (oscillator frequency) / 12
:
7) Which serial modes possess the potential to support the multi-processor type of communication? a. Modes 0 & 1
b. Modes 1 & 2
c. Modes 2 & 3
d. All of the above
Answer
Modes 2 & 3 ation
ANSW
8) How does it become possible for 9th bit to differentiate the address byte from the data byte during th transmission process in multiprocessor communication?
a. By recognizing 9th bit as '1' for address byte & '0' for data byte
b. By recognizing 9th bit as '0' for address byte & '1' for data byte
c. By recognizing 9th bit as '1' for address as well as data bytes
d. By recognizing 9th bit as '0' for address as well as data bytes
Answer
ANSW By recognizing 9th bit as '1' for address byte & '0' for data byte
:
9) Which byte has the capability to interrupt the slave when SM2 bit is assigned to be '1' after the initia process in the multiprocessor mode of communication?
a. Address byte
b. Data byte
c. Both a & b
d. None of the above
Answer
Address byte ation
ANSW
10) Which bits of opcode specify the type of registers to be used in the register addressing mode? a. LSB
b. MSB
c. Both a & b
d. None of the above
Answer
LSB ation
ANSW
11) Which base-register is preferred for address calculation of a byte that is to be accessed from progr memory by base-register plus register-indirect addressing mode? a. DPTR
b. PSW
c. PCON
d. All of the above
Answer
ANSW DPTR
:
12) What does the symbol '#' represent in the instruction MOV A, #55H? a. Direct datatype
b. Indirect datatype
c. Immediate datatype
d. Indexed datatype
Answer
Immediate datatype ation
ANSW
13) How many single byte, two-byte and three-byte instructions are supported by MCS-51 from the ove instruction set?
a. 55 - single byte, 35 two-byte & 21 three-byte instructions
b. 50 - single byte, 30 two-byte & 31 three-byte instructions
c. 42 - single byte, 45 two-byte & 24 three-byte instructions
d. 45 - single byte, 45 two-byte & 17 three-byte instructions
Answer
14) What kind of PSW flags remain unaffected by the data transfer instructions? a. Auxillary Carry Flags
b. Overflow Flags
c. Parity Flags
d. All of the above
Answer
ANSW All of the above
:
15) Which instruction should be adopted for moving an accumulator to the register from the below men mnemonics?
a. MOV A, Rn
b. MOV A, @ Ri
c. MOV Rn, A
d. MOV direct, A
Answer
MOV Rn, A ation
ANSW
16) What does the instruction XCHD A, @Ri signify during the data transfer in the program execution? a. Exchange of register with an accumulator
b. Exchange of direct byte with an accumulator
c. Exchange of indirect RAM with an accumulator
d. Exchange of low order digit indirect RAM with an accumulator
Answer
Exchange of low order digit indirect RAM with an accumulator ation
ANSW
17) Which flag allow to carry out the signed as well as unsigned addition and subtraction operations? a. CY
b. OV
c. AC
d. F0
Answer
ANSW OV
:
18) How many bytes are supposed to get occupied while subtracting indirect RAM from an accumulato with borrow under the execution of SUBB A, @Ri? a. 1
b. 2
c. 3
d. 4
Answer
1 ation
ANSW
19) What can be the oscillator period for the multiplication operation of A & B in accordance to 16-bit p especially in B:A registers?
a. 12
b. 24
c. 36
d. 48
Answer
48 ation
ANSW
20) Which form of instructions also belong to the category of logical instructions in addition to bitwise instructions?
a. Single-operand instructions
b. Rotate instructions
c. Swap instructions
d. All of the above
Answer
ANSW All of the above :
21) Which rotate instruction/s has an ability to modify CY flag by moving the bit-7 & bit-0 respectively t accumulator?
a. RR & RL
b. RLC & RRC
c. RR & RRC
d. RL & RLC
Answer
RLC & RRC ation
ANSW
22) Which among the single operand instructions complement the accumulator without affecting any o flags?
a. CLR
b. SETB
c. CPL
d. All of the above
Answer
ANSW CPL
:
23) Match the following
a. JC rel -------------------- 1. Jump if direct bit is set & clear bit
b. JNC rel ------------------ 2. Jump if direct bit is set
c. JB bit, rel --------------- 3. Jump if direct bit is not set
d. JBC bit, rel ------------ 4. Jump if carry is set
e. JNB bit, rel ------------- 5. Jump if carry is not set
a. A-3, B-2, C-1, D-4, E-5
b. A-5, B-2, C-4, D-1, E-3
c. A-5, B-4, C-3, D-2, E-1
d. A-4, B-5, C-2, D-1, E-3
Answer
A-4, B-5, C-2, D-1, E-3 ation
ANSW
24) What is the possible range of transfer control for 8-bit relative address especially in 2's complemen with respect to the first byte of preceding instruction?
a. -115 to 132 bytes
b. -130 to 132 bytes
c. -128 to 127 bytes
d. -115 to 127 bytes
Answer
-128 to 127 bytes ation
ANSW
25) Which among the category of program branching instructions allow 16 bit address to be specified & jump anywhere within 64K block of program memory?
a. Long jumps (LJMP)
b. Short jumps (SJMP)
c. Absolute jumps (AJMP)
d. All of the above
Answer
ANSW Long jumps (LJMP) :
26) Consider the below mentioned statements. Which among them is /are approved to be incorrect in c calling instructions of program branching?
a. Absolute Calls instructions specify 11-bit address and calling subroutine within 2K program memory
b. Long call instructions specify 16-bit address and subroutine anywhere within 64K program memory b
c. Short call instructions specify 16-bit address and subroutine within 4K program memory block
d. All long call and short call instructions specify 11 bit address and the calling subroutine within 16K pmemory block
a. Only A
b. B & D
c. A & C
d. C & D
Answer
ANSW C & D
:
27) Match the following instruction mnemonics with their description.
a. CJNE A,direct,rel ------------ 1. Compare immediate to indirect and Jump if not equal
b. CJNE A,#data,rel ------------ 2. Compare direct byte to accumulator and Jump if not equal
c. CJNE @Ri, #data,rel ------- 3. Compare immediate to register and Jump if not equal
d. CJNE Rn, # data rel -------- 4. Compare immediate to accumulator and Jump if not equal a. A-1, B-2, C-3, D-4
b. A-2, B-4, C-1, D-3
c. A-4, B-3, C-2, D-1
d. A-2, B-4, C-3, D-1
Answer
4
ANSW
A-2, Bation:
, C-1, D-3
lanation is available for this question!
28) What is the correct chronological order of the following steps involved in the LCALL operation?
1. Load the value of 16-bit destination address to program counter
2. Increment of the program counter by value '3'
3. Storage of the higher byte of program counter on the stack
4. Increment of the stack pointer by value'1'
5. Storage of the lower byte of program counter on the stack 6. Increment in the value of stack pointer
a. 5, 3, 1, 6, 2, 4
b. 1, 3, 2, 5, 4, 6
c. 2, 4, 5, 6, 3, 1
d. 5, 3, 6, 2, 4, 1
Answer
2, 4, 5, 6, 3, 1 ation
ANSW
29) What is the status of stack pointer for the execution of PUSH and POP operations?
a. It gets post-decremented for PUSH & pre-incremented for POP
b. It gets pre-incremented for PUSH & post-decremented for POP
c. It gets pre-incremented for PUSH as well as POP
d. It gets post-decremented for PUSH as well as POP
Answer
ANSW It gets pre-incremented for PUSH & post-decremented for POP
:
30) What does the following pictorial representation of PUSH operation in the stack pointer indicate am below stated conclusions/inferences?
a. Stack Pointer is incremented by 2
b. Location 55H in on-chip stack memory gets loaded with 44H
c. Stack Pointer gets initialized by 56H
d. Data Pointer gets loaded with an immediate data 44H which ultimately leads to initialization of stack p a. Only A
b. Only B
c. B & D
d. C & D
Answer
ANSW C & D
:
1) Which functioning element of microcontroller generate and transmit the address of instructions to m through internal bus?
a. Instruction Decoding Unit
b. Timing and Control Unit
c. Program Counter
d. Arithmetic Logic Unit
Answer
Program Counter ation
ANSW
2) How does the microcontroller communicate with the external peripherals/memory? a. via I/O ports
b. via register arrays
c. via memory
d. All of the above
Answer
ANSW via I/O ports
31) Which instructions contribute to an effective adoption or utilization of stack memory which usually crucial role in storage of intermediate results?
a. ACALL
b. RETI
c. PUSH & POP
d. All of the above
Answer
ANSW All of the above
:
:
3) Why do the microprocessors possess very few bit manipulating instructions?
a. Because they mostly operate on bits/ word data
b. Because they mostly operate on byte/word data
c. Both a & b
d. None of the above
Answer
Because they mostly operate on byte/word data ation
ANSW
4) Which minimum mode signal is used for demultiplexing the data and address lines with the assistan external latch in a microprocessor while accessing memory segment? a. INTA
b. DTE
c. HOLD
d. ALE
Answer
ANSW ALE
:
5) Which word size is approved to be of greater importance for performing the small computational tas with its storage usability feature adopted by ASCII code? a. 4-bit
b. 8-bit
c. 16-bit
d. 32-bit
Answer
ANSW
8-bit ation:
lanation is available for this question!
6) Which among the below stated statements does not exhibit the characteristic feature of 16-bit microcontroller?
a. Large program & data memory spaces
b. High speed
c. I/O Flexibility
d. Limited Control Applications
Answer
Limited Control Applications ation
ANSW
7) Which microcontrollers offer the provisional and salient software features of fault handling capabilit interrupt vector efficiency and versatile addressing?
a. TMS 1000 (4 bit)
b. TMS 7500 (8 bit)
c. Intel 8096 (16 bit)
d. Intel 80960 (32 bit)
Answer
ANSW Intel 80960 (32 bit)
:
8) Which category of microcontrollers acquire the complete hardware configuration on its chip so as to particular application?
a. Embedded Memory Microcontrollers
b. External Memory Microcontrollers
c. Both a & b
d. None of the above
Answer
Embedded Memory Microcontrollers ation
ANSW
9) External Memory Microcontrollers can overcome the limitations of insufficient in-built program and memory by allowing the connections of external memory using _________
a. Serial Port Pins as address and data lines
b. Parallel Port Pins as address and data lines
c. Parallel Port Pins as address and control lines
d. Serial Port Pins as address and control lines
Answer
Parallel Port Pins as address and data lines ation
ANSW
10) How are the address and data buses removed in external memory type of microcontrollers? a. Through demultiplexing by external latch & ALE signal
b. Through demultiplexing by external latch & DLE signal
c. Through multiplexing by external latch & DLE signal
d. Through multiplexing by external latch & ALE signal
Answer
ANSW Through multiplexing by external latch & ALE signal
:
11) What are the significant designing issues/factors taken into consideration for RISC Processors? a. Simplicity in Instruction Set
b. Pipeline Instruction Optimization
c. Register Usage Optimization
d. All of the above
Answer
All of the above ation
ANSW
12) What does the compact and uniform nature of instructions in RISC processors facilitate to? a. Compiler optimization
b. Pipelining
c. Large memory footprints
d. None of the above
Answer
Pipelining ation
ANSW
13) Which register of current procedure resemble physically similar to the parameter register of called procedure during register to register operation in an overlapping window of RISC Processors? a. Local Register
b. Temporary Register
c. Parameter Register
d. All of the above
Answer
ANSW Temporary Register
:
14) Which architectural scheme has a provision of two sets for address & data buses between CPU and memory?
a. Harvard architecture
b. Von-Neumann architecture
c. Princeton architecture
d. All of the above
Answer
Harvard architecture ation
ANSW
15) Which factors/parameters contribute to an effective utilization or adoption of Harvard architecture b of the DSPs for streaming data?
a. Greater memory bandwidth
b. Predictable nature of bandwidth
c. Both a & b
d. None of the above
Answer
Both a & b ation
ANSW
16) Which kind of multiplexing scheme is adopted by Von-Newman architecture especially for program data fetching purposes?
a. Time Division Multiplexing
b. Frequency Division Multiplexing
c. Statistical Time Division Multiplexing
d. Code Division Multiplexing
Answer
ANSW Time Division Multiplexing :
17) Which feature deals with the fetching of next instruction during the execution of current instruction irrespective of the memory access?
a. Fetching
b. Pre-fetching
c. Fetch & Decoding
d. All of the above
Answer
Pre-fetching ation
ANSW
18) What are the essential tight constraint/s related to the design metrics of an embedded system? a. Ability to fit on a single chip
b. Low power consumption
c. Fast data processing for real-time operations
d. All of the above
Answer
ANSW All of the above
:
19) Which abstraction level undergo the compilation process by converting a sequential program into state machine and register transfers while designing an embedded system? a. System
b. Behaviour
c. RT
d. Logic
Answer
Behaviour ation
ANSW
20) Which characteristics of an embedded system exhibit the responsiveness to the assortments or va in system's environment by computing specific results for real-time applications without any kind of postponement?
a. Single-functioned Characteristics
b. Tightly-constraint Characteristics
c. Reactive & Real time Characteristics
d. All of the above
Answer
Reactive & Real time Characteristics ation
ANSW
21) Which lines are utilized during the enable state of hardware flow control in DTE and DCE devices o RS232?
a. CD & IR
b. DSR & DTR
c. RTS & CTS
d. None of the above
Answer
ANSW RTS & CTS
:
22) Which among the below stated lines represent the handshaking variant usually and only controlled software in the handshaking process?
a. XON/ XOFF
b. DCD & GND
c. TxD & RxD
d. All of the above
Answer
XON/ XOFF ation
ANSW
23) Match the following registers with their functions :
a. Line Status Register -------------------- 1. Set Up the communication parameters
b. Line Control Register ------------------ 2. Sharing of similar addresses
c. Transmit & Receive Buffers --------- 3. Status Determination of Tx & Rr a. A-2, B-1, C-3
b. A-1, B-2, C-3
c. A-3, B-1, C-2
d. A-3, B-2, C-1
Answer
-3, B-1, C-2
ANSW A
:
24) Which protocol standard of serial communication specify the bi-directional and half-duplex form of transmission by allowing various numbers of drivers and receivers in bus configuration? a. RS232
b. RS2485
c. RS422
d. RS423
Answer
RS2485 ation
ANSW
25) What is the maximum device handling capacity of serial standard protocol RS485 in terms of driver receivers on a single line?
a. 8
b. 10
c. 16
d. 32
Answer
32 ation
ANSW
26) Which mechanism automates the enabling of RS485 transceiver with an elimination of hardware ha line during each time of the data transmission?
a. RTS Control
b. Send Data Control
c. Tri-State Control
d. Bit-wise Enable Timing Control
Answer
ANSW Send Data Control
:
27) What does an IC that initiate or enable the data transfer on bus can be regarded as, in accordance t protocol specifications?
a. Bus Master
b. Bus Slaves
c. Bus Drivers
d. Bus Data Carriers
Answer
Bus Master ation
ANSW
28) What is the directional nature of two active wires SDA & SCL usually adopted in I2C Bus for carryin information between the devices?
a. Uni-directional
b. Bi-directional
c. Multi-directional
d. None of the above
Answer
Bi-directional ation
ANSW
29) Which potential mode of operation indicate the frequent sending of byte to the slave corresponding reception of an acknowledge signal when it becomes desirable for the master to write to the slave durin transmission in I2C bus?
a. Master in master-transmit mode & Slave in slave-receive mode
b. Slave in slave-transmit mode & Master in master-receive mode
c. Master in master-transmit mode as well as master-receive mode
d. Slave in slave-transmit mode as well as slave-receive mode
Answer
1) Which among the below stated salient feature/s of SPI contribute to the wide range of its applicabilit a. Simple hardware interfacing
b. Full duplex communication
c. Low power requirement
d. All of the above
Answer
ANSW All of the above
:
2) Which characteristic/s of two-wire interface (TWI) make it equally valuable in comparison to serialinterface (SPI)?
a. Less number of pins on IC packages than SPI
b. It possesses formal standard unlike SPI
ANSW Master in master-transmit mode & Slave in slave-receive mode :
30) Which processor has the necessity of manual optimization for the generation of assembly languag especially for the embedded systems?
a. RISC
b. CISC
c. Both a & b
d. None of the above
Answer
ANSW CISC
:
pe
c. Slave Addressing before communication & better hardware control d. All of the above
Answer
All of the above ation
ANSW
3) What is the maximum speed of operating frequency exhibited by SPI as compared to that of TWI? a. Less than 10 MHz
b. Greater than 10 MHz
c. Equal to 10 MHz
d. None of the above
Answer
Greater than 10 MHz ation
ANSW
4) Which development tool/program has the potential to allocate the specific addresses so as to load th object code into memory?
a. Loader
b. Locator
c. Library
d. Linker
Answer
ANSW Locator
:
5) The assembler list file generated by an assembler mainly includes ________
a. binary codes
b. assembly language statements
c. offset for each instruction
d. All of the above
Answer
All of the above ation
ANSW
6) Which kind of assembler do not generate the programs in similar language as that used by microby developing the program in high-level languages making them as machine independent? a. Macro Assembler
b. Cross Assembler
c. Meta Assembler
d. All of the above
Answer
Cross Assembler ation
ANSW
7) What kind of address/es is /are usually assigned to program by the linker adopted in an execution of assembler?
a. Absolute Address
b. Relative Address starting from unity
c. Relative Addresss starting from zero
d. None of the above
Answer
ANSW Relative Addresss starting from zero
:
co
8) What are the major form of functionalities associated to high-level language compilers? a. Generation of an application program
b. Conversion of generated code from higher level language to machine-level language c. Both a & b
d. None of the above
Answer
Both a & b ation
ANSW
9) Which development tool can facilitate the creation and modification of source programs in addition assembly and higher -level languages?
a. Editor
b. Assembler
c. Debugger
d. High-level language Compiler
Answer
Editor ation
ANSW
10) EPROM Programming versions are of greater significance to designers for________ a. Debugging of hardware prototype
b. Debugging of software prototype
c. Loading the programs in microcontrollers
d. All of the above
Answer
ANSW All of the above
:
11) It is a characteristic provision of some debuggers to stop the execution after each instruction because__________
a. it facilitates to analyze or vary the contents of memory and register
b. it facilitates to move the break point to a later point
c. it facilitates to rerun the program
d. it facilitates to load the object code program to system memory
Answer
it facilitates to analyze or vary the contents of memory and register ation
ANSW
12) Which component is replaced by an in-circuit emulator on the development board for testing purpo a. RAM
b. I/O Ports
c. Micro-controller IC
d. All of the above
Answer
ANSW Micro-controller IC
:
13) It is feasible for an in-circuit emulator to terminate at the middle of the program execution so as to the contents of _________
a. memory
b. registers
c. Both a & b
d. None of the above
Answer
ANSW
Both a & b ation:
lanation is available for this question!
14) Which operations are not feasible to perform by simulator programs in accordance to real time programming?
a. Memory Operations
b. I/O Operations
c. Register Operations
d. Debugging Operations
Answer
I/O Operations ation
ANSW
15) What is/are the possible way/s of displaying the data by logic analyzer? a. Logic state format
b. Hexadecimal & Map format
c. Timing diagram format
d. All of the above
Answer
ANSW All of the above
:
16) Which type of triggering allow the trigger qualifier circuit to compare the input data word with the w programmed by the user in logic analyzer?
a. Triggering from external input
b. Programmable Triggering
c. Both a & b
d. None of the above
Answer
Programmable Triggering ation
ANSW
17) Which mandatory contents can be visualized by the hexadecimal display format of a logic analyzer a. Data Bus
b. Address Bus
c. Both a & b
d. None of the above
Answer
Both a & b ation
ANSW
18) How many samples can be displayed before and after the trigger respectively if the trigger-pulse is by center-trigger mode to display 1024 bit counts?
a. 512 & 512 samples respectively
b. 512 & 1024 samples respectively
c. 1024 & 512 samples respectively
d. 1024 & 1024 samples respectively
Answer
ANSW 1024 & 1024 samples respectively
:
19) What is/are the consequences of driving the LED in the form of an output function?
a. Pin sources the current when made low without glowing LED
b. Pin sinks the current when made high without glowing LED
c. Pin sources the current when made high by glowing LED
d. Pin sinks the current when made low by glowing LED
Answer
Pin sinks the current when made low by glowing LED ation
ANSW
20) What is the possible range of current limiting resistor essential for lightening the LED in certain applications after pressing the push-button?
a. 25-55 Ω
b. 55-110 Ω
c. 110-220 Ω
d. 220-330 Ω
Answer
220-330 Ω ation
ANSW
21) Which among the below given assertions exhibits the dependency of LED status over them, especi LED and push button connection?
a. Closure of pushbutton
b. Low Output pin driven by microcontroller
c. Both a & b
d. None of the above
Answer
ANSW Both a & b
:
22) What does the availability of LCD in 16 x 2 typical value indicate?
a. 16 lines per character with 2 such lines
b. 16 characters per line with 2 such lines
c. 16 pixels per line with 2 such sets
d. 16 lines per pixel with two such sets
Answer
16 characters per line with 2 such lines ation
ANSW
23) Which control line/s act/s as an initiator by apprising LCD about the inception of data transmission microcontroller?
a. Enable (EN)
b. Register Select (RS)
c. Read/Write (RW)
d. All of the above
Answer
ANSW Enable (EN)
:
24) The display operations in LCD are undertaken on EN line with ______ a. 0 to 1 transitions
b. 1 to 0 transitions
c. Both a & b
d. None of the above
Answer
ANSW
1 to 0 transitions ation:
lanation is available for this question!
25) When can a LCD display the text form of data?
a. only when RS line is high
b. only when RW line is high
c. only when RS line is low
d. only when RW line is low
Answer
only when RS line is high ation
ANSW
26) How does the instruction execute for read command 'Get LCD Status' in LCD? a. By allowing EN line to go from low to high
b. By allowing EN line to go from high to low
c. By maintaining EN line to be stable
d. None of the above
Answer
ANSW By allowing EN line to go from high to low
:
27) Match the HEX codes of LCD with their associated functions
a. 10H ----------------- 1) Shifting of cursor position to right
b. 14H ----------------- 2) Shifting of cursor position to left
c. 18H ----------------- 3) 2 lines & 5 x 7 character font
d. 38H ----------------- 4) Shifting of an entire display to the left a. A-4, B–1, C-2, D-3
b. A-3, B–2, C-1, D-4
c. A-2, B-1, C-4, D-3
d. A-1, B–2, C-3, D-4
Answer
A-2, B-1, C-4, D-3 ation
ANSW
28) How much delay is necessarily provided after the power-on-reset condition in order to overcome th predicaments related to valid power supply levels assigned to microcontroller and LCD? a. 10 ms
b. 12 ms
c. 15 ms
d. 25 ms
Answer
15 ms ation
ANSW
29) On which factors do the delay between two characters depend for display purposes in LCD? a. Clock frequency
b. Display module
c. Both a & b
d. None of the above
Answer
ANSW Both a & b
1) Which is the an alternative mechanism of preventing the software to be dependent on several delay along with an optimum time proficiency of checking LCD status at the interfacing level? a. Polling of DB7 bit of the data bus
b. Updating the faster display in less time
c. Generalization of clock frequency and display module
d. All of the above
Answer
ANSW Polling of DB7 bit of the data bus
:
2) What is the purpose of using Schmitt Trigger in the hardware circuit for key debouncing? a. Noise Elimination
b. Improvement in Noise Immunity
c. Increase in Noise Figure
d. Reduction in Noise Temperature
:
30) How many data lines are essential in addition to RS, EN and RW control lines for interfacing LCD w Atmel 89C51 microcontroller?
a. 3
b. 5
c. 8
d. 10
Answer
No is available for this question
ANSW 8
:
Answer
ANSW
ation:
Improvement in Noise Immunity
lanation is available for this question!
3) Which lines are driven low under the software control during interfacing HEX keyboard with PIC 16F a. Scan Lines
b. Return Lines
c. Both a & b
d. None of the above
Answer
Scan Lines ation
ANSW
4) Which keys are encoded for scan lines with '1101' value (RB1 low) condition? a. 0, 4, 8, C
b. 1, 5, 9, D
c. 2, 6, A, E
d. 3, 7, B, F
Answer
ANSW 2, 6, A, E
:
5) What value of 'B' should be loaded in the TRISB register if return lines (RB7:RB4) and RB3:RB0 are supposed to be inputs and outputs respectively after the PORT B initialization? a. 11000100
b. 11110011
c. 11110001
d. 11110000
Answer
11110000 ation
ANSW
6) Which pin should be set low along with the program counter contents more than 0FFFH for accessin external program memory?
a. EA
b. ALE
c. PSEN
d. All of the above
Answer
EA ation
ANSW
7) Which essential operation should be performed while reading the external program byte on the data a. Latching of lower address byte
b. Latching of higher address byte
c. Latching of any addressable byte irrespective of priority level
d. None of the above
Answer
ANSW Latching of lower address byte
:
8) Which bus/es acquire/s the potential of liberally receiving the code byte after addressing the lower o address byte?
a. Data bus
b. Address bus
c. Both a & b
d. None of the above
Answer
Data bus ation
ANSW
9) What happens when the RD signal becomes low during the read cycle?
a. Data byte gets loaded from external data memory to data bus
b. Address byte gets loaded from external data memory to address bus
c. Data byte gets loaded from external program memory to data bus
d. Address byte gets loaded from external program memory to address bus
Answer
10) Which among the below mentioned memory components possessess the potential of generating a signal for the latching purpose of lower address byte in an external data memory? a. CPU
b. Data Bus
c. Port 0
d. Port 1
Answer
ANSW CPU
:
11) Which ports assist in addressing lower order and higher address bytes into the data bus simultane while accessing the external data memory?
a. Port 0 & Port 1 respectively
b. Port 1 & Port 2 respectively
c. Port 0 & Port 2 respectively
d. Port 2 & Port 3 respectively
Answer
Port 0 & Port 2 respectively ation
ANSW
12) What happens when the latch is kept open once after the execution of the latch operation by allowi digital data byte to appear at the output?
a. Variation in an input digital data
b. Output data remains constant despite changing input digital data
c. Variation in an output data with respect to input data variation d. Cannot predict
Answer
ANSW Output data remains constant despite changing input digital data
:
13) How is the latch interfacing with the microcontroller related to the number of digital output function
a. It increases the number of digital output functions in a time multiplexed manner
b. It decreases the number of digital output functions in a time multiplexed manner
c. It increases the number of digital output functions in a frequency multiplexed manner
d. It decreases the number of digital output functions in a frequency multiplexed manner
Answer
It increases the number of digital output functions in a time multiplexed manner ation
ANSW
14) What is the correct chronological order/sequence of steps associated with the latch operations giv below?
a. Loading the data on output port
b. Increment in the digital output functions by using microcontroller pins
c. Application of latch enable signal to desired latch a. A, B, C
b. A, C, B
c. C, A, B
d. B, A, C
Answer
A, C, B ation
ANSW
15) In an electromechanical relay, the necessity of connecting an external base resistance arises only
_________
a. in the presence of an internal pull-up resistor
b. in the absence of an internal pull-up resistor
c. in the absence of an internal push-up resistor
d. in the presence of an internal push-up resistor
Answer
ANSW in the absence of an internal pull-up resistor
:
16) Which diodes are employed in the electromechanical relays since the inductor current cannot be re to zero?
a. Tunnel Diode
b. Shockley Diode
c. Freewheeling Diode
d. Zener Diode
Answer
Freewheeling Diode ation
ANSW
17) Where do the power gets dissipated during the gradual decay of an inductor current (upto zero valu turning OFF the transistor in an electromechanical relay?
a. Internal resistance of the coil
b. Internal Diode resistance
c. Both a & b
d. None of the above
Answer
ANSW Both a & b
:
18) Which factors indicate the necessity of sample and hold circuit in the process of analog-to-digital conversion?
a. Instantaneous variation in an input signal
b. Analog-to-digital conversion time
c. Both a & b
d. None of the above
Answer
Both a & b ation
ANSW
19) Which pin/signal of ADC AD571 interfacing apprises about the accomplishment of data reading in t microcontroller so as to indicate ADC to get ready for the next data sample? a. BLANK /CONVERT (high)
b. BLANK/DR (low)
c. DATA READY (DR)
d. All of the above
Answer
BLANK /CONVERT (high) ation
ANSW
20) Which errors are more likely to get generated by conversion time and ADC resolution respectively accordance to the digital signal processing?
a. Sampling & Quantization Errors
b. Systematic & Random Errors
c. Overload & Underload Errors
d. None of the above
Answer
ANSW Sampling & Quantization Errors
:
21) What is the purpose of blanking (BI) associated with the 7-segment display operations?
a. To turn ON the display
b. To turn OFF the display
c. To pulse modulate the brightness of display
d. To pulse modulate the lightness of display
a. B & C
b. A & D
c. A & B
d. C & D
Answer
B & C ation
ANSW
22) How are the port pins of microcontroller calculated for time-multiplexing types of display? a. 4 + number of digits to be displayed
b. 4 raised to the number of digits to be displayed
c. 4 - number of digits to be displayed
d. 4 x number of digits to be displayed
Answer
ANSW 4 + number of digits to be displayed
:
23) What does the RAM location at 44H indicates about the seven segment code? a. 7-segment code for the third character
b. 7-segment code for the fourth character
c. Display of select code for third display
d. Display of select code for fourth display
1) Where does the comparison level occur for 16-bit contents in the compare mode operation? a. Between CCPR1 register & TMR1
b. Between CCPR1 & CCPR2 registers
c. Between CCPR2 register & TMR1
d. Between CCPR2 register & TMR0
Answer
Between CCPR1 register & TMR1 ation
ANSW
2) Why are the pulse width modulated outputs required in most of the applications? a. To control average value of an input variables
b. To control average value of output variables
c. Both a & b
d. None of the above
Answer
ANSW To control average value of output variables
:
3) What would be the resolution value if oscillator and PWM frequencies are 16MHz and 2 MHz respecti a. 2
b. 3
Answer
ANSW 7
: -
segment code for the third character
No is available for this question!
c. 4
d. 8
Answer
3 ation
ANSW
4) How do the variations in an average value get affected by PWM period?
a. Longer the PWM period, faster will be the variation in an average value
b. Shorter the PWM period, faster will be the variation in an average value
c. Shorter the PWM period, slower will be the variation in an average value
d. Longer the PWM period, slower will be the variation in an average value
Answer
Shorter the PWM period, faster will be the variation in an average value ation
ANSW
5) Which among the below stated components should be filtered for determining the cut-off frequency corresponding to the PW period of low-pass filter?
a. Fundamental FPWM & higher harmonics
b. Resonant FPWM & higher harmonics
c. Slowly Varying DC components
d. Slowly Varying AC components
Answer
ANSW Fundamental FPWM & higher harmonics
:
6) Which among the below stated conditions are selected by the SSPCON & SSPSTAT control bits? a. Slave Select mode in slave mode
b. Data input sample phase
c. Clock Rate in master mode
d. All of the above
Answer
All of the above ation
ANSW
7) Which bit of SSPCON must be necessarily set so as to enable the synchronization of serial port? a. WCOL
b. SSPOV
c. CKP
d. SSPEN
Answer
SSPEN ation
ANSW
8) What should be the value of SSPM3:SSPM0 bits so that SPI can enter the slave mode by enabling SS control?
a. 0000
b. 0100
c. 0010
d. 0001
Answer
ANSW 0100
:
9) Which bits assist in determining the I2C bit rate during the initialization process of MSSP module in I mode?
a. SSPADD
b. SSPBUF
c. Both a & b
d. None of the above
Answer
SSPADD ation
ANSW
10) Which command/s should be essentially written for I2C input threshold selection and slew rate con operations?
a. SSPSTAT
b. SSPIF
c. ACKSTAT
d. All of the above
Answer
ANSW SSPSTAT
:
11) Where does the baud rate generation occur and begins to count the bits required to get transmitted an execution (set) of BF flag?
a. SCL line
b. SDA line
c. Both a & b
d. None of the above
Answer
SDA line ation
ANSW
12) How many upper bits of SSPSR are comparable to the address located in SSPADD especially after shifting of 8 bits into SSPSR under the execution of START condition? a. 7
b. 8
c. 16
d. 32
Answer
7 ation
ANSW
13) Where should the value of TX9 bit be loaded during the 9 bit transmission in an asynchronous mod a. TXSTA
b. RCSTA
c. SPBRG
d. All of the above
Answer
ANSW TXSTA
:
14) What is the purpose of a special function register SPBRG in USART?
a. To control the operation associated with baud rate generation
b. To control an oscillator frequency
c. To control or prevent the false bit transmission of 9th bit d. All of the above
Answer
To control the operation associated with baud rate generation ation
ANSW
15) Why is the flag bit TXIF tested or examined in the PIR1 register after shifting all the data bits during initialization process of USART in asynchronous mode?
a. For ensuring the transmission of byte
b. For ensuring the reception of byte
c. For ensuring the on-chip baud rate generation
d. For ensuring the 9th bit as a parity
Answer
For ensuring the transmission of byte ation
ANSW
16) How is the baud rate specified for high-speed (BRGH = 1) operation in an asynchronous mode? a. FOSC / 8 (X + 1)
b. FOSC / 16 (X + 1)
c. FOSC / 32 (X + 1)
d. FOSC / 64 (X + 1)
Answer
OSC / 16 (X + 1)
ANSW F
:
17) What is the status of shift clock supply in an USART synchronous mode? a. Master-internally, Slave-externally
b. Master-externally, Slave-internally
c. Master & Slave (both) - internally
d. Master & Slave (both) - externally
Answer
Master-internally, Slave-externally ation
ANSW
18) Which bit plays a salient role in defining the master or slave mode in TXSTA register especially in synchronous mode?
a. RSRC
b. CSRC
c. SPEN
d. SYNC
Answer
CSRC ation
ANSW
19) Which register/s should set the SPEN bit in order to configure RC7/RX/DT pins as DT (data lines)? a. TXSTA
b. RCSTA
c. Both a & b
d. None of the above
Answer
ANSW RCSTA
:
20) Which among the below assertions represent the salient features of PIC in C-18 compiler? a. Transparent read/ write access to an external memory
b. Provision of supporting an inline assembly during the necessity of an overall control
c. Integration with MPLAB IDE for source-level debugging d. All of the above
Answer
All of the above ation
ANSW
21) Which command-line option of compiler exhibits the banner comprising overall number of errors, messages, warnings and version number after an accomplishment of the compilation process? a. help
b. verbose
c. overlay
d. char
Answer
verbose ation
ANSW
22) In which aspects do the output functions specified in stdio.h differ from ANSI specified versions? a. Provision of MPLAB specific extensions
b. Floating-point Format Support
c. Data in Program Memory
d. All of the above
Answer
ANSW All of the above
:
23) What does the 'program idata' section of data memory contain in C-18 Compiler?
a. statically assigned/allocated initialized user variables
b. statically assigned /allocated uninitialized user variables
c. only executable instructions
d. variables as well as constants
Answer
statically assigned/allocated initialized user variables ation
ANSW
24) Which instruction is applicable to set any bit while performing bitwise operation settings? a. bcf
b. bsf
c. Both a & b
d. None of the above
Answer
ANSW bsf
:
25) Where is the result stored after an execution of increment and decrement operations over the spec purpose registers in PIC?
a. File Register
b. Working Register
c. Both a & b
d. None of the above
Answer
ANSW
Both a & b ation:
lanation is available for this question!
26) Which flags of status register are most likely to get affected by the single-cycle increment and decr instructions?
a. P Flags
b. C Flags
c. OV Flags
d. Z Flags
Answer
ANSW Z Flags
:
1) The interface between an analog signal and a digital processor is a. D/A converter
b. A/D converter
c. Modulator
d. Demodulator
Answer
ANSW A/D converter
:
2) The speech signal is obtained after
a. Analog to digital conversion
b. Digital to analog conversion
c. Modulation
d. Quantization
Answer
Digital to analog conversion ation
ANSW
3) Telegraph signals are examples of
a. Digital signals
b. Analog signals
c. Impulse signals
d. Pulse train
Answer
Digital signals ation
ANSW
4) As compared to the analog systems, the digital processing of signals allow
1) Programmable operations
2) Flexibility in the system design
3) Cheaper systems
4) More reliability
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1, 2 and 4 are correct
d. All the four are correct
Answer ANSW All the four are correct
:
5) The Nyquist theorem for sampling
1) Relates the conditions in time domain and frequency domain
2) Helps in quantization
3) Limits the bandwidth requirement 4) Gives the spectrum of the signal
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1 and 3 are correct ation
ANSW
6) Roll-off factor is
a. The bandwidth occupied beyond the Nyquist Bandwidth of the filter
b. The performance of the filter or device
c. Aliasing effect
d. None of the above
Answer
ANSW The bandwidth occupied beyond the Nyquist Bandwidth of the filter
:
7) A discrete time signal may be
1) Samples of a continuous signal
2) A time series which is a domain of integers
3) Time series of sequence of quantities 4) Amplitude modulated wave
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1, 2 and 3 are correct ation
ANSW
8) The discrete impulse function is defined by
a. δ(n) = 1, n ≥ 0
= 0, n ≠ 1
b. δ(n) = 1, n = 0
= 0, n ≠ 1
c. δ(n) = 1, n ≤ 0
= 0, n ≠ 1
d. δ(n) = 1, n ≤ 0
= 0, n ≥ 1
Answer
ANSW δ(n) = 1, n = 0
1
= 0, n ≠ :
9) DTFT is the representation of
a. Periodic Discrete time signals
b. Aperiodic Discrete time signals
c. Aperiodic continuous signals
d. Periodic continuous signals
Answer
Aperiodic Discrete time signals ation
ANSW
10) The transforming relations performed by DTFT are
1) Linearity
2) Modulation
3) Shifting
4) Convolution
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
ANSW All the four are correct
:
11) The DFT is preferred for
1) Its ability to determine the frequency component of the signal
2) Removal of noise
3) Filter design
4) Quantization of signal
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1 and 3 are correct ation
ANSW
12) Frequency selectivity characteristics of DFT refers to
a. Ability to resolve different frequency components from input signal
b. Ability to translate into frequency domain
c. Ability to convert into discrete signal
d. None of the above
Answer
Ability to resolve different frequency components from input signal ation
ANSW
13) The Cooley–Tukey algorithm of FFT is a
a. Divide and conquer algorithm
b. Divide and rule algorithm
c. Split and rule algorithm
d. Split and combine algorithm
Answer
ANSW Divide and conquer algorithm
:
14) FFT may be used to calculate
1) DFT
2) IDFT
3) Direct Z transform 4) In direct Z transform
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1 and 2 are correct ation
ANSW
15) DIT algorithm divides the sequence into
a. Positive and negative values
b. Even and odd samples
c. Upper higher and lower spectrum
d. Small and large samples
Answer
ANSW Even and odd samples
:
16) The computational procedure for Decimation in frequency algorithm takes a. Log2 N stages
b. 2Log2 N stages
c. Log2 N2 stages
d. Log2 N/2 stages
Answer
ANSW
Log2 N stages ation:
lanation is available for this question!
17) The transformations are required for
1) Analysis in time or frequency domain
2) Quantization
3) Easier operations
4) Modulation
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1 and 3 are correct ation
ANSW
18) The s plane and z plane are related as
a. z = esT
b. z = e2sT
c. z = 2esT
d. z = esT/2
Answer
ANSW z = esT
:
19) The similarity between the Fourier transform and the z transform is that
a. Both convert frequency spectrum domain to discrete time domain
b. Both convert discrete time domain to frequency spectrum domain
c. Both convert analog signal to digital signal
d. Both convert digital signal to analog signal
Answer
Both convert discrete time domain to frequency spectrum domain ation
ANSW
20) The ROC of a system is the
a. range of z for which the z transform converges
b. range of frequency for which the z transform exists
c. range of frequency for which the signal gets transmitted
d. range in which the signal is free of noise
Answer
ANSW range of z for which the z transform converges
:
21) The several ways to perform an inverse Z transform are
1) Direct computation
2) Long division
3) Partial fraction expansion with table lookup
4) Direct inversion
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
ANSW
ation:
All the four are correct
lanation is available for this question!
22) The anti causal sequences have ______ components in the left hand sequences. a. Positive
b. Negative
c. Both a and b
d. None of the above
Answer
Positive ation
ANSW
23) For an expanded power series method, the coefficients represent a. Inverse sequence values
b. Original sequence values
c. Negative values only
d. Positive values only
Answer
ANSW Inverse sequence values
:
24) The region of convergence of x/ (1+2x+x2) is a. 0
b. 1
c. Negative
d. Positive
Answer
1 ation
ANSW
25) The IIR filter designing involves
a. Designing of analog filter in analog domain and transforming into digital domain
b. Designing of digital filter in analog domain and transforming into digital domain
c. Designing of analog filter in digital domain and transforming into analog domain
d. Designing of digital filter in digital domain and transforming into analog domain
Answer
Designing of digital filter in analog domain and transforming into digital domain ation
ANSW
26) For a system function H(s) to be stable
a. The zeros lie in left half of the s plane
b. The zeros lie in right half of the s plane
c. The poles lie in left half of the s plane
d. The poles lie in right half of the s plane
Answer
ANSW The poles lie in left half of the s plane
:
27) IIR filter design by approximation of derivatives has the limitations
1) Used only for transforming analog high pass filters
2) Used for band pass filters having smaller resonant frequencies
3) Used only for transforming analog low pass filters
4) Used for band pass filters having high resonant frequencies a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
2 and 3 are correct ation
ANSW
28) The filter that may not be realized by approximation of derivatives techniques are
1) Band pass filters
2) High pass filters
3) Low pass filters 4) Band reject filters
a. 1, 2 and 3 are correct
b. 2 and 4 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
ANSW 2 and 4 are correct
:
29) In direct form for realisation of IIR filters,
1) Denominator coefficients are the multipliers in the feed forward paths
2) Multipliers in the feedback paths are the positives of the denominator coefficients
3) Numerator coefficients are the multipliers in the feed forward paths
4) Multipliers in the feedback paths are the negatives of the denominator coefficients a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 3 and 4 are correct
d. All the four are correct
Answer
3 and 4 are correct ation
ANSW
30) The direct form II for realisation involves
1) The realisation of transfer function into two parts
2) Realisation after fraction
3) Product of two transfer functions 4) Addition of two transfer functions
a. 1, 2 and 3 are correct
b. 1 and 3 are correct
c. 3 and 4 are correct
d. All the four are correct
Answer
ANSW 1 and 3 are correct
:
31) The cascade realisation of IIR systems involves
1) The transfer function broken into product of transfer functions
2) The transfer function divided into addition of transfer functions
3) Factoring the numerator and denominator polynomials 4) Derivatives of the transfer functions
a. 1, 2 and 3 are correct
b. 1 and 3 are correct
c. 3 and 4 are correct
d. All the four are correct
Answer
1 and 3 are correct ation
ANSW
32) The advantage of using the cascade form of realisation is
1) It has same number of poles and zeros as that of individual components
2) The number of poles is the product of poles of individual components
3) The number of zeros is the product of poles of individual components 4) Over all transfer function may be determined
a. 1, 2 and 3 are correct
b. 1 and 3 are correct
c. 1 and 4 are correct
d. All the four are correct
Answer
ANSW 1 and 4 are correct
:
33) Which among the following represent/s the characteristic/s of an ideal filter? a. Constant gain in passband
b. Zero gain in stop band
c. Linear Phase Response
d. All of the above
Answer
All of the above ation
ANSW
34) FIR filters ________
A. are non-recursive
B. do not adopt any feedback
C. are recursive D. use feedback
a. A & B
b. C & D
c. A & D
d. B & C
Answer
A & B ation
ANSW
35) In tapped delay line filter, the tapped line is also known as ________ a. Pick-on node
b. Pick-off node
c. Pick-up node
d. Pick-down node
Answer
ANSW Pick-off node
:
36) How is the sensitivity of filter coefficient quantization for FIR filters? a. Low
b. Moderate
c. High
d. Unpredictable
Answer
Low ation
ANSW
37) Decimation is a process in which the sampling rate is __________. a. enhanced
b. stable
c. reduced
d. unpredictable
Answer
ANSW reduced
:
38) Anti-imaging filter with cut-off frequency ωc = π/ I is specifically used _______ upsampling process removal of unwanted images.
a. Before
b. At the time of
c. After
d. All of the above
Answer
ANSW
After ation:
lanation is available for this question!
39) Which units are generally involved in Multiply and Accumulate (MAC)? a. Adder
b. Multiplier
c. Accumulator
d. All of the above
Answer
All of the above ation
ANSW
40) In DSP processors, which among the following maintains the track of addresses of input data as w coefficients stored in data and program memories?
a. Data Address Generators (DAGs)
b. Program sequences
c. Barrel Shifter
d. MAC
Answer
ANSW Data Address Generators (DAGs)
:
1
) The cost of the digital processors is cheaper because
a. Processor allows time sharing among a number of signals
b. The hardware is cheaper
c. Require less maintenance
d. Less power consumption
Answer
Processor allows time sharing among a number of signals ation
ANSW
2) The operations that may be performed on vectors in Euclidean Space are
1) Inner product, distance between vectors
2) Norm of a vector, orthogonal vectors
3) Orthonormal functions
4) Vector division
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 1, 2 and 4 are correct
d. All the four are correct
Answer
1, 2 and 3 are correct ation
ANSW
3) The norm or length of a signal is given by
a. The square of the energy of the signal
b. The square root of the energy of the signal
c. The inverse of the energy of the signal
d. The cube root of the energy of the signal
Answer
ANSW The square root of the energy of the signal
:
4) The principle of Gram-Schmidt Orthogonalization (GSO) states that, any set of M energy signals can expressed as
a. Summation of N ortho normal basis functions, where N ≤ M.
b. Linear combinations of N ortho normal basis functions, where N ≤ M.
c. Product of logarithmic combinations of N ortho normal basis functions, where N ≤ M.
d. Product of inverse squares of N ortho normal basis functions, where N ≤ M.
Answer
Linear combinations of N ortho normal basis functions, where N ≤ M. ation
ANSW
5) A signal x[n] is anti symmetric or odd when
a. x[-n] = x[n] • x[n]
b. x[n] = -x[n]
c. x[n] = [x[n]]2
d. x[-n] = -x[n]
Answer
-n] = -x[n]
anation:
ANSW x[
Expl
6) Time shifting of discrete time signal means
a. y[n] = x[n-k]
b. y[n] = x[-n-k]
c. y[n] = -x[n-k]
d. y[n] = x[n+k]
Answer
y[n] = x[n-k] ation
ANSW
7) Time reversal of a discrete time signal refers to a. y[n] = x[-n+k]
b. y[n] = x[-n]
c. y[n] = x[-n-k]
d. y[n] = x[n-k]
Answer
y[n] = x[-n] ation
ANSW
8) Causal systems are the systems in which
a. The output of the system depends on the present and the past inputs
b. The output of the system depends only on the present inputs
c. The output of the system depends only on the past inputs
d. The output of the system depends on the present input as well as the previous outputs
Answer
ANSW The output of the system depends on the present and the past inputs
:
9) The basic properties of DFT includes
1) Linearity
2) Periodicity
3) Circular symmetry
4) Summation
a. 1, 2 and 3 are correct
b. 1, 2 and 4 are correct
c. 1 and 3 are correct
d. All the four are correct
Answer
1, 2 and 3 are correct ation
ANSW
10) Padding of zeros increases the frequency resolution. a. True
b. False
Answer
False ation
ANSW
11) Circular shift of an N point is equivalent to
a. Circular shift of its periodic extension and its vice versa
b. Linear shift of its periodic extension and its vice versa
c. Circular shift of its aperiodic extension and its vice versa
d. Linear shift of its aperiodic extension and its vice versa
Answer
ANSW Linear shift of its periodic extension and its vice versa
:
12) The circular convolution of two sequences in time domain is equivalent to a. Multiplication of DFTs of two sequences
b. Summation of DFTs of two sequences
c. Difference of DFTs of two sequences
d. Square of multiplication of DFTs of two sequences
Answer
Multiplication of DFTs of two sequences ation
ANSW
13) For the calculation of N- point DFT, Radix -2 FFT algorithm repeats a. 2(N Log2 N) stages
b. (N Log2 N)2/2 stages
c. (N Log2 N)/2 stages
d. (N Log2(2 N))/2 stages
Answer
(N Log2 N)/2 stages ation
ANSW
14) Radix - 2 FFT algorithm performs the computation of DFT in
a. N/2Log2 N multiplications and 2Log2 N additions
b. N/2Log2 N multiplications and NLog2 N additions
c. Log2 N multiplications and N/2Log2 N additions
d. NLog2 N multiplications and N/2Log2 N additions
Answer
ANSW N/2Log2 N multiplications and NLog2 N additions :
15) The overlap save method is used to calculate
a. The discrete convolution between a sampled signal and a finite impulse response (FIR) filter
b. The discrete convolution between a sampled signal and an infinite impulse response (IIR) filter
c. The discrete convolution between a very long signal and a finite impulse response (FIR) filter
d. The discrete convolution between a very long signal and a infinite impulse response (IIR) filter
Answer
The discrete convolution between a very long signal and a finite impulse response (FIR) filter ation
ANSW
16) Overlap-Add Method Deals with principles that
a. The linear convolution of a discrete-time signal of length L and a discrete-time signal of length M produces a time convolved result of length L + M - 1
b. The linear convolution of a discrete-time signal of length L and a discrete-time signal of length M produces a time convolved result of length L + M
c. The linear convolution of a discrete-time signal of length L and a discrete-time signal of length M produces a time convolved result of length 2L + M - 1
d. The linear convolution of a discrete-time signal of length L and a discrete-time signal of length M produces a time convolved result of length 2L + 2M - 1
Answer
ANSW The linear convolution of a discrete-time signal of length L and a discrete-time signal of length M produces a discrete-time convolved result of length L + M - 1
:
17) ROC does not have
a. zeros
b. poles
c. negative values
d. positive values
Answer
poles ation
ANSW
18) Damping is the ability of a system
a. To support oscillatory nature of the system’s transient response
b. To oppose the continuous nature of the system's transient response
c. To oppose the oscillatory nature of the system's transient response
d. To support the discrete nature of the system's transient response
Answer
To oppose the oscillatory nature of the system's transient response ation
ANSW
19) The condition for a system to be causal is
a. All poles of its transfer function must be left half of s-plane
b. All poles of its transfer function must be right half of s-plane
c. All zeros of its transfer function must be right half of s-plane
d. All zeros of its transfer function must be left half of s-plane
Answer
ANSW All poles of its transfer function must be right half of s-plane
:
20) The condition for a system to be stable is
a. All poles of its transfer function lie on the left half of s-plane
b. All poles of its transfer function must be right half of s-plane
c. All zeros of its transfer function must be right half of s-plane
d. All zeros of its transfer function must be left half of s-plane
Answer
All poles of its transfer function lie on the left half of s-plane ation
ANSW
21) Partial fraction method involves
a. Allotting coefficients
b. Dividing the numerator by denominator to get fractions
c. Dividing single fraction into parts
d. None of the above
Answer
ANSW Dividing single fraction into parts
:
22) The factors formed for partial fraction are a combination of
1) Linear factors
2) Irreducible quadratic factors
3) Square roots
4) Cube roots
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
1 and 2 are correct ation
ANSW
23) For a partial fraction method to be followed,
1) The degree of the numerator must be more than the degree of the denominator.
2) The factors formed for partial fraction are a combination of Linear factors and Irreducible quadratic fa3) The degree of the numerator must be less than the degree of the denominator.
4) The factors formed for partial fraction are a combination of Linear factors and Square roots. a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
2 and 3 are correct ation
ANSW
24) The partial fraction of x2+1/x(x-1)2 is
a. 1/ (x-1) + 2/(x-1)2 - 1/x
b. 1/ (x-1) + 2/(x-1)2 - 3/x
c. 1/ (x-1) + 2/(x-1)2 - 3/x2
d. 1/ (x+1) + 2/(x+1)2 - 1/x
Answer ANSW 1/ (x-1) + 2/(x-1)2 - 1/x
:
25) The impulse invariant method is obtained by
a. Sampling the impulse response of an equivalent analog filter
b. Taking backward difference for the derivative
c. Mapping from s-domain to z-domain
d. Approximation of derivatives
Answer
Sampling the impulse response of an equivalent analog filter ation
ANSW
26) The transformation technique in which there is one to one mapping from s-domain to z-domain is a. Approximation of derivatives
b. Impulse invariance method
c. Bilinear transformation method
d. Backward difference for the derivative
Answer
ANSW Bilinear transformation method
:
27) The frequency warping is referred as
1) lower frequencies in analog domain expanded in digital domain 2) lower frequencies in digital domain expanded in analog domain
3) non linear mapping
4) compression of higher frequencies
a. 1, 3 and 4 are correct
b. 2 and 4 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
1, 3 and 4 are correct ation
ANSW
28) The magnitude response of Butterworth filter has
1) Flat stop band
2) Flat pass band
3) Tapering pass band 4) Tapering stop band
a. 1 and 2 are correct
b. 2 and 4 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
1 and 2 are correct ation
ANSW
29) In the cascaded form of realisation, the polynomials are factored into
a. a product of 1st-order and 2nd-order polynomials
b. a product of 2nd-order and 3rd-order polynomials
c. a sum of 1st-order and 2nd-order polynomials
d. a sum of 2nd-order and 3rd-order polynomials
Answer
ANSW a product of 1st-order and 2nd-order polynomials
:
30) Parallel form of realisation is done in
a. High speed filtering applications
b. Low speed filtering applications
c. Both a and b
d. None of the above
Answer
High speed filtering applications ation
ANSW
31) A partial-fraction expansion of the transfer function in Z-1 leads to a. The parallel form II structure
b. The parallel form I structure
c. Cascaded structure
d. None of the above
Answer
The parallel form I structure ation
ANSW
32) A direct partial-fraction expansion of the transfer function in Z leads to a. The parallel form II structure
b. The parallel form I structure
c. Cascaded structure
d. None of the above
Answer
ANSW The parallel form II structure :
33) Basically, group delay is the delayed response of filter as a function of ________. a. Phase
b. Amplitude
c. Frequency
d. All of the above
Answer
Frequency ation
ANSW
34) A filter is said to be linear phase filter if the phase delay and group delay are _______ a. High
b. Moderate
c. Low
d. Constant
Answer
ANSW Constant
:
35) Which among the following has/have a provision to support an adaptive filtering mechanism? a. IIR
b. FIR
c. Both a and b
d. None of the above
Answer
ANSW
Both a and b ation:
lanation is available for this question!
36) Which is/are the correct way/s for the result quantization of an arithmetic operation? a. Result Truncation
b. Result Rounding
c. Both a and b
d. None of the above
Answer
Both a and b ation
ANSW
37) In direct form realization for an interpolator, which among the following generates an intermediate a. Upsampler
b. Downsampler
c. Anti-imaging filter
d. Anti-aliasing filter
Answer
ANSW Upsampler
:
38) To change the sampling rate for better efficiency in two or multiple stages, The decimation and interpolation factors must be _________unity.
a. Less than
b. Equal to
c. Greater than
d. None of the above
Answer
Greater than ation
ANSW
39) Which address/es is/are generated by Program Sequences? a. Data Address
b. Instruction Address
c. Both a and b
d. None of the above
Answer
Instruction Address ation
ANSW
40) In DAGs, which register/s provide/s increment or step size for index register especially during the r move?
a. Index Register
b. Length & Base Register
c. Modify Register
d. All of the above
Answer
ANSW Modify Register
:
1) Two vectors a, b are orthogonal if
a. <a,b> = 0
b. <a,b> = <a,b>
c. <a,b> = 1
d. <a,b> = - <a,b>
Answer
<a,b> = 0 ation
ANSW
2) One dimensional signal is a function of
a. Multiple independent variables
b. Single independent variable
c. Multiple dependent variables
d. Single dependent variable
Answer
Single independent variable ation
ANSW
3) Superposition of signals in a linear system refers to the
a. Output that is product of all the signals
b. Output that is sum of all the signals
c. Output that is of highest amplitude of all the signals
d. Output that is of largest spectrum of all the signals
Answer
ANSW Output that is sum of all the signals
:
4) The scaling of a sequence x[n] by a factor α is given by a. y[n] = α [x[n]]2
b. y[n] = α x[n2]
c. y[n] = α x[n]
d. y[n] = x[n]x[-n]
Answer
y[n] = α x[n] ation
ANSW
5) DFT is applied to
a. Infinite sequences
b. Finite discrete sequences
c. Continuous infinite signals
d. Continuous finite sequences
Answer
ANSW Finite discrete sequences
:
6) The filtering is performed using DFT using
1) Limited size or blocks of data
2) Small memory size
3) Large memory size 4) Large segments of data
a. 1, 2 and 3 are correct
b. 3 and 4 are correct
c. 1 and 2 are correct
d. All the four are correct
Answer
1 and 2 are correct ation
ANSW
7) In Overlap-Add Method with linear convolution of a discrete-time signal of length L and a discretesignal of length M, for a length N, zero padding should be of length a. L, M > N
b. L, M = N
c. L, M < N
d. L, M < N2
Answer
L, M < N ation
ANSW
8) Discrete cosine transforms (DCTs) express a function or a signal in terms of
a. Sum of cosine functions oscillating at different frequencies
b. Sum of cosine functions oscillating at same frequencies
c. Sum of cosine functions at different sampling intervals
d. Sum of cosine functions oscillating at same sampling intervals
Answer
ANSW Sum of cosine functions oscillating at different frequencies
:
9) A system is said to be unstable if
a. None of the poles of its transfer function is shifted to the right half of s-plane
b. At least one zero of its transfer function is shifted to the right half of s-plane
c. At least one pole of its transfer function is shifted to the right half of s-plane
d. At least one pole of its transfer function is shifted to the left half of s-plane
Answer
At least one pole of its transfer function is shifted to the right half of s-plane ation
ANSW
10) A system is said to be marginally unstable if
a. None of its zeros of its transfer function lies on the jω axis of s-plane
b. At least one zero of its transfer function lies on the jω axis of s-plane
c. None of its poles of its transfer function lies on the jω axis of s-plane
d. At least one pole of its transfer function lies on the jω axis of s-plane
Answer
At least one pole of its transfer function lies on the jω axis of s-plane ation
ANSW
11) The nonlinear difference equations are solved using a. Iterative method
b. Cobweb model
c. Phase diagram
d. Power series method
Answer
ANSW Phase diagram
:
12) Correlation is used for
1) Computation of average power in waveforms
2) Climatography
3) Identification of binary code word in PCM systems
4) Quantization
a. 1, 2 and 3 are correct
b. 1 and 2 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
1, 2 and 3 are correct ation
ANSW
13) The Chebyshev filters have
1) Flat pass band
2) Flat stop band
3) Equiripple pass band 4) Tapering stop band
a. 1 and 2 are correct
b. 2 and 4 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
ANSW 2 and 3 are correct
:
14) The Elliptic filters have
1) Flat pass band
2) Flat stop band
3) Equiripple pass band 4) Equiripple stop band
a. 1 and 2 are correct
b. 3 and 4 are correct
c. 2 and 3 are correct
d. All the four are correct
Answer
3 and 4 are correct ation
ANSW
15) The effects caused due to finite word lengths are
1) Coefficient quantization error
2) Adder overflow limit cycle
3) Round off noise
4) Limit cycles
a. 1, 2 and 3 are correct
b. 1 and 3 are correct
c. 1 and 4 are correct
d. All the four are correct
Answer ANSW All the four are correct
:
16) The error in the filter output that results from rounding or truncating calculations within the filter is a. Coefficient quantization error
b. Adder overflow limit cycle
c. Round off noise
d. Limit cycles
Answer
Round off noise ation
ANSW
17) Consider the assertions given below. Which among them is an advantage of FIR Filter?
a. Necessity of computational techniques for filter implementation
b. Requirement of large storage
c. Incapability of simulating prototype analog filters
d. Presence of linear phase response
Answer
Presence of linear phase response ation
ANSW
18) For a linear phase filter, if Z1 is zero then what would be the value of Z1-1 or 1/ Z1? a. Zero
b. Unity
c. Infinity
d. Unpredictable
Answer
ANSW Zero
:
19) In FIR filter design, which among the following parameters is/are separately controlled by using Ka window?
a. Order of filter (M)
b. Transition width of main lobe
c. Both a and b
d. None of the above
Answer
Both a and b ation
ANSW
20) Which window function is also regarded as 'Raised-cosine window'? a. Hamming window
b. Hanning window
c. Barlett window
d. Blackman window
Answer
ANSW Hanning window
:
21) In Barlett window, the triangular function resembles the tapering of rectangular window sequence _ from the middle to the ends.
a. linearly
b. elliptically
c. hyperbolically
d. parabolically
Answer
linearly ation
ANSW
22) In Gibb's phenomenon, the ringing effect is predominantly present near the ______ . a. bandgap
b. bandedge
c. bandwidth
d. bandshell
Answer
bandedge ation
ANSW
23) How is/are the roundoff errors reduced in the digital FIR filter?
a. By representation of all products with double-length registers
b. By rounding the results after acquiring the final sum
c. Both a and b
d. None of the above
Answer
ANSW Both a and b
:
24) In linear phase realization, equal valued coefficients are taken common for reducing the requisite n of ________.
a. adders
b. subtractors
c. multipliers
d. dividers
Answer
multipliers ation
ANSW
25) Which filters exhibit their dependency upon the system design for the stability purpose? a. FIR
b. IIR
c. Both a and b
d. None of the above
Answer
IIR ation
ANSW
26) In FIR filters, which among the following parameters remains unaffected by the quantization effect? a. Magnitude Response
b. Phase Characteristics
c. Both a and b
d. None of the above
Answer
ANSW Phase Characteristics
:
27) In the frequency response characteristics of FIR filter, the number of bits per coefficient should be _________in order to maintain the same error.
a. Increased
b. Constant
c. Decreased
d. None of the above
Answer
Increased ation
ANSW
28) In cascade form of realization, how many bits should be used to represent the FIR filter coefficients order to avoid the quantization effect on filter coefficients? a. 5 to 10
b. 12 to 14
c. 20 to 24
d. 28 to 40
Answer
ANSW 12 to 14
:
29) Consider the assertions (steps) given below. Which among the following is a correct sequence of designing steps for the sampling rate converters?
A. Computation of decimation/interpolation factor for each stage.
B. Clarification of anti-aliasing / anti-imaging filter requirements.
C. Designing of filter at each stage.
D. Calculation of optimum stages of decimation/ interpolation yielding maximum efficient implementatio
a. A, B, C, D
b. C, A, D, B
c. D, A, B, C
d. B, D, A, C
Answer
B, D, A, C ation
ANSW
30) For designing a multirate LPF with passband 0 to 50 Hz, stopband 60 to 280 Hz, stopband deviation passband deviation 0.01 and sampling frequency (fs) = 400 Hz, what would be the value of normalized tr width?
a. 0.025 Hz
b. 1.25 Hz
c. 1.50 Hz
d. 2.6 Hz
Answer
0.025 Hz ation
ANSW
31) In polyphase filters, the subfilters which share a common delay line results in the reduction of the s requirement by factor ______
a. 1
b. 2
c. 3
d. 4
Answer
ANSW 3
:
32) How is the operating level of sampling rate for the subfilters involved in the polyphase filters? a. Low
b. Moderate
c. High
d. None of the above
Answer
Low ation
ANSW
33) In polyphase filter, which kind of realization is/are adopted for three subfilters possessing coefficie a. Cascade
b. Parallel
c. Direct
d. All of the above
Answer
Parallel ation
ANSW
34) How is the sampling rate conversion achieved by factor I/D?
a. By increase in the sampling rate with (I)
b. By filtering the sequence to remove unwanted images of spectra of original signal
c. By decimation of filtered signal with factor D
d. All of the above
Answer
ANSW All of the above :
35) Program Sequence plays a crucial role in maintaining the track of ___________ a. Program counter increment
b. Conditional branching & looping
c. Subroutine & interrupt handling
d. All of the above
Answer
All of the above ation
ANSW
36) In DSP Processor, what kind of queuing is undertaken/executed through instruction register and instruction cache?
a. Implicate
b. Explicate
c. Both a and b
d. None of the above
Answer
ANSW Implicate
:
37) In TMS 320 C6x processor architecture, which functional unit is adopted for transferring the data fr register to and from control register?
a. L2
b. M2
c. S2
d. D2
Answer
S2 ation
ANSW
38) In TMS 320 C6x processor architecture, which operation/s is/are performed by 'M' functional unit? a. Bit expansion
b. Bit interleaving & deinterleaving
c. Rotation & Variable shifting
d. All of the above
Answer
All of the above ation
ANSW
39) In C6X processor, which external device/s get/s acquire/s an interface support by EMIF peripheral? a. Synchronous burst
b. Asynchronous devices
c. Externally shared memory devices
d. All of the above
Answer
ANSW All of the above
:
40) Which peripheral on C 6 X processor allows buffering of serial samples in memory by port automat especially with an assistance of EDMA controller?
a. Boot Loader
b. HPI
c. EMIF
d. McBSP
Answer
ANSW McBSP
