Analog Circuit Pune University MCQs

Analog Circuit Pune University MCQs

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Voltage-Ampere Characteristics of Diode – 1”.

1. The abbreviation PIV in the case of a diode stands for ____________

a) Peak Inferior Voltage

b) Problematic Inverse Voltage

c) Peak Inverse Voltage

d) Peak Internal Voltage

Answer: c

Explanation: PIV stands for Peak Inverse Voltage. It is the maximum reverse bias voltage which a diode can bear without breakdown.

2. What is meant by the PIV rating of a diode?

a) Maximum reverse bias potential which can be applied across a diode without breakdown

b) Maximum forward bias potential which can be applied across a diode without breakdown

c) Minimum potential required by a diode to reach conduction state

d) Maximum power allowable to a diode

Answer: a

Explanation: PIV rating indicates the maximum allowable reverse bias voltage which can be safely applied to a diode. If a reverse potential is greater than PIV rating then the diode will enter reverse breakdown region.

3. The voltage after which the diode current exponentially increases with forward bias is NOT known as ________

a) Offset voltage

b) Threshold potential

c) Firing potential

d) Peak forward voltage

Answer: d

Explanation: The voltage after which a diode increases rapidly is known as the offset voltage, threshold voltage, firing potential and cut-in voltage. Beyond this voltage, the forward bias voltage overcomes the potential barrier and rapid conduction occurs.

4. The diode current equation is not applicable in ____________

a) Forward biased state

b) Reverse biased state

c) Unbiased state

d) It is applicable in all bias states

Answer: d

Explanation: Diode equation is I=I O (e qV/kT – 1). It is applicable in all bias condition that is forward, reverse and unbiased states.

5. Emission coefficient of Germanium is ___________

a) 1

b) 1.1

c) 1.5

d) 2

Answer: a

Explanation: Emission coefficient or ideality factor accounts the effect of recombination taking place in the depletion region. The range of factor is from 1 to 2. For Germanium it is 1.

6. The ideality factor of Silicon is ___________

a) 1

b) 2

c) 1.3

d) 1.7

Answer: b

Explanation: Emission coefficient or ideality factor accounts the effect of recombination taking place in the depletion region. The range of factor is from 1 to 2. For silicon it is 2.

7. What is the value of the voltage equivalent of temperature at room temperature (27 o C)?

a) 26mV

b) 36mV

c) 0.26mV

d) 260mV

Answer: a

Explanation: Voltage equivalent of temperature VT is equal to the product of Boltzman constant (J.K -1 ) and temperature in Kelvin. At a temperature of 27°C, it’s value is V T =KT/q=26mV.

8. What happens to cut-in voltage when the temperature increases?

a) Cut-in voltage increases

b) Cut-in voltage decreases

c) Cut-in voltage either increases or decreases

d) Cut-in voltage doesn’t depend on temperature

Answer: b

Explanation: As temperature increases the conductivity of a semiconductor increases. The diode conducts smaller voltage at larger temperature. Therefore, cut-in voltage decreases.

9. When temperature increases, reverse saturation current _________

a) Increases

b) Decreases

c) Doesn’t depend on temperature

d) Either increases or decreases

Answer: a

Explanation: As temperature increases the conductivity of a semiconductor increases. Reverse saturation current increases as temperature increases.

This set of Analog Circuits Interview Questions and Answers focuses on “Voltage-Ampere Characteristics of Diode – 2”.

1. Which of the following graph represents the I-V characteristics of a real diode?

a) analog-circuits-interview-questions-answers-q1a

b) analog-circuits-interview-questions-answers-q1b

c) analog-circuits-interview-questions-answers-q1c

d) analog-circuits-interview-questions-answers-q1d

Answer: d

Explanation: Fig A represents constant voltage drop model of a diode. In this model, the diode is assumed to be a perfect insulator in reverse bias. On forward bias up to the cut-in voltage, it is assumed to be an insulator and after it becomes perfect conductor. Fig B represents an ideal diode, which is in forward bias, it is a perfect conductor and in reverse bias, it is perfect insulator. We can also depict the piecewise linear mode of diode through Fig C. This assumption is very close to constant voltage drop model except the fact that after cut-in voltage instead of perfect insulator diode is assumed as a ohmic device. Fig D represents real diode. The diode in real life is similar to the characteristics. That is, after the cut-in voltage, graph is exponential and in reverse bias mode current is in micro or nano ampere range.

2. Which of the following I-V characteristics represents a typical Si diode?

a) analog-circuits-interview-questions-answers-q2a

b) analog-circuits-interview-questions-answers-q2b

c) analog-circuits-interview-questions-answers-q2c

d) analog-circuits-interview-questions-answers-q2d

Answer: b

Explanation: Fig B denotes a Si diode because the cut-in voltage is 0.7V and after this the current is exponential. Also in reverse bias there is a nano ampere range current it must also be accounted. The cut-off of 0.3V is correct for Germanium and not for a Si diode. Also, fig A, fig C & fig D which are seemingly linear are the piecewise linear model, not a real representation for the diode. Therefore, fig B is the best.

3. Which of the following graph represents a typical Ge diode?

a) analog-circuits-interview-questions-answers-q2a

b) analog-circuits-interview-questions-answers-q2b

c) analog-circuits-interview-questions-answers-q2c

d) analog-circuits-interview-questions-answers-q2d

Answer: a

Explanation: Fig A denotes a Germanium diode because the cut-in voltage is 0.3V and after this the current is exponential. Also in reverse bias there is a nano ampere range current it must also be accounted. The cut-off of 0.7V is correct for Silicon and not for a Germanium diode. Also, fig B, fig C & fig D which are seemingly linear are the piecewise linear model, not a real representation for the diode.

4. Which of the following graph represent a zener diode which is voltage rated as “VZ”?

a) analog-circuits-interview-questions-answers-q4a

b) analog-circuits-interview-questions-answers-q4b

c) analog-circuits-interview-questions-answers-q4c

d) analog-circuits-interview-questions-answers-q4d

Answer: b

5. Which of the following statement is false for a zener diode voltage rated as “VZ“?

a) Reverse breakdown occurs at VZ

b) Forward breakdown occurs at VZ

c) Zener diode is a heavily doped diode

d) Usually operates in reverse bias mode

Answer: b

Explanation: Voltage rating is the voltage at which reverse breakdown occurs. Voltage rating of a zener diode indicates the voltage beyond which current increases rapidly. Beyond this point increase in reverse bias voltage will only reflect on current which means voltage drop beyond this point is almost constant. This phenomenon holds the key role in the working of zener diode as a voltage regulator. Zener diode is a heavily doped diode because for zener breakdown we need a narrow junction. It operates in reverse bias mode. In forward bias mode it operates as a normal diode.

6. Voltage rating of a Zener diode denotes ____________

a) Reverse breakdown voltage

b) Forward breakdown voltage

c) Voltage at which current is maximum

d) Maximum forward voltage which a diode can withstand

Answer: a

Explanation: Voltage rating of a zener diode indicates the voltage beyond which current increases rapidly. Beyond this point increase in reverse bias voltage will only reflect on current which means voltage drop beyond this point is almost constant. This phenomenon holds the key role in the working of zener diode as a voltage regulator.

7. Knee current in the case of zener diode implies _____________

a) Forward bias current beyond which I-V characteristics is a straight line

b) Reverse bias current above which I-V characteristics is a straight line

c) Forward cut-in current beyond which current is directly proportional to voltage

d) Maximum allowable reverse bias current through a zener diode

Answer: b

Explanation: Knee current indicates the current above which reverse characteristics is a straight line. That is the relationship between current and voltage beyond this point will be directly proportional and this is very useful for solving real life problems.

8. Which of the following graph represents I-V characteristics of an ideal diode?

a) analog-circuits-interview-questions-answers-q1a

b) analog-circuits-interview-questions-answers-q1b

c) analog-circuits-interview-questions-answers-q1c

d) analog-circuits-interview-questions-answers-q1d

Answer: b

9. Which of the following I-V characteristics represents the constant voltage drop model of diode?

a) analog-circuits-interview-questions-answers-q1a

b) analog-circuits-interview-questions-answers-q1b

c) analog-circuits-interview-questions-answers-q1c

d) analog-circuits-interview-questions-answers-q1d

Answer: a

10. Which of the following statement about a Si diode is true?

a) Cut-in voltage is always higher than the reverse breakdown voltage

b) Reverse saturation current is in the order of mA

c) Cut-in voltage is 1V

d) Reverse scale current is in the order of nA

Answer: d

Explanation: Cut-in voltage of Si diode is 0.7V but reverse breakdown voltage is almost 50V for the Si diode. So clearly cut-in voltage is much less than the reverse breakdown voltage. Reverse saturation current is in the order of nano amperes. Scale current is another name of saturation current. It is named as scale current because saturation current is directly proportional to cross sectional area of a diode.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Characteristic Equation of Diode 1”.

1. Calculate the forward bias current of a Si diode when forward bias voltage of 0.4V is applied, the reverse saturation current is 1.17×10 -9 A and the thermal voltage is 25.2mV.

a) 9.156mA

b) 8.23mA

c) 1.256mA

d) 5.689mA

Answer: a

Explanation: Equation for diode current

I=I 0 ×(e (V/ηV T ) -1) where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since in this question ideality factor is not mentioned it can be taken as one.

I 0 = 1.17 x 10 -9 A, V T = 0.0252V, η = 1, V = 0.4V

Therefore, I = 1.17×10 -9 xe 0.4/0.025 -1 = 9.156mA.

2. Calculate the thermal voltage when the temperature is 25°C.

a) 0V

b) 0V

c) 0.026V

d) 0.25V

Answer: b

Explanation: Thermal voltage V T is given by k T/q

Where k is the boltzman constant and q is the charge of electron. This can be reduced to

V T = T K /11600

Therefore, V T = 298.15/11600 = 0.0257V.

3. Calculate the reverse saturation current of a diode if the current at 0.2V forward bias is 0.1mA at a temperature of 25°C and the ideality factor is 1.5.

a) 5.5x 10 -9 A

b) 5.5x 10 -8 A

c) 5.5x 10 -7 A

d) 5.6x 10 -10 A

Answer: c

Explanation: Equation for diode current

I=I 0 ×(e (V/ηV T ) – 1) where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Here, I = 0.1mA, η = 1.5, V = 0.2V, V T = T K /11600

Therefore, V T at T = 25+273=298 is 298/11600 = 0.0256V.

Therefore, reverse saturation current analog-circuits-questions-answers-characteristic-equation-diode-1-q3a

I O =0.00055mA = 5.5×10 -7 A.

4. Find the applied voltage on a forward biased diode if the current is 1mA and reverse saturation current is 10 -10 . Temperature is 25°C and takes ideality factor as 1.5.

a) 0.658V

b) 0.726V

c) 0.526V

d) 0.618V

Answer: d

Explanation: Equation for diode current

I=I 0 ×(e (V/ηV T ) -1) where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

V T at T = 25+273=298 is 298/11600 = 0.0256V, η = 1.5, I = 1mA, I 0 = 10 -10 A

analog-circuits-questions-answers-characteristic-equation-diode-1-q4

5. Find the temperature at which a diode current is 2mA for a diode which has reverse saturation current of 10 -9 A. The ideality factor is 1.4 and the applied voltage is 0.6V forward bias.

a) 69.65°C

b) 52.26°C

c) 25.23°C

d) 70.23°C

Answer: a

Explanation: Equation for diode current

I=I 0 ×(e (V/ηV T ) -1) where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

I 0 = 10 -9 A, η = 1.4, V = 0.6V, I = 2mA

analog-circuits-questions-answers-characteristic-equation-diode-1-q5

We know thermal voltage V T = T K /11600. Therefore, T K = V T x11600 = 0x11600 = 342.65K = 69.65°C.

6. Consider a silicon diode with η=1.2. Find the change in voltage if the current changes from 0.1mA to 10mA.

a) 0.154V

b) 0.143V

c) 0.123V

d) 0.165V

Answer: b

Explanation: Equation for diode current

I=I 0 ×(e (V/ηV T ) -1) where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

η = 1.2, I2 = 10mA, I1 = 0.1mA and take V T = 0.026V

analog-circuits-questions-answers-characteristic-equation-diode-1-q6

7. If current of a diode changes from 1mA to 10mA what will be the change in voltage across the diode. The ideality factor of diode is 1.2.

a) 0.718V

b) 7.18V

c) 0.0718V

d) 0.00728V

Answer: c

Explanation: η = 1.2, I2 = 10mA, I1 = 1mA and take V T = 0.026V

analog-circuits-questions-answers-characteristic-equation-diode-1-q7 .

8. What will be the ratio of final current to initial current of a diode if the voltage of a diode changes from 0.7V to 872.5mV. Take ideality factor as 1.5.

a) 90.26

b) 52.36

c) 80.23

d) 83.35

Answer: d

Explanation: η = 1.5, ΔV = 0.8725V and take V T = 0.026V

analog-circuits-questions-answers-characteristic-equation-diode-1-q8

9. What will be the current I in the circuit diagram below. Take terminal voltage of diode as 0.7V and I 0 as 10 -12 A.

analog-circuits-questions-answers-characteristic-equation-diode-1-q9

a) 2.4mA

b) 0.9mA

c) 1mA

d) 4mA

Answer: a

Explanation: Let V D be the voltage of diode, then by Kirchoff’s loop rule

3V = V D + IR1

This method of assumption contains small error but it is the simplest method.

Let V D be 0.7V. Now the current I = /1k = 2.3mA. Now the diode voltage for 2.3mA

V D = V T ln⁡(I/I 0 ) = 0.026 x ln((2.3×10 )/10 ) = 0.5864V.

Now the current becomes /1000 = 2.41mA.

10. Find current I through the circuit using characteristic equation of diode. The terminal voltage of each diode is 0.6V. Reverse saturation current is 10 -12 A.

analog-circuits-questions-answers-characteristic-equation-diode-1-q10

a) 0.84mA

b) 1.84mA

c) 2.35mA

d) 3.01mA

Answer: b

Explanation: Let V D be the voltage of diode, then by Kirchoff’s loop rule

3V = 2V D + IR1

This method of assumption contains small error but it is the simplest method.

Let V D be 0.6V. Now the current I = /1k = 1.8mA.

The V D = V T ln((I/I O )+1) = 0.58V

Hence current is )/1k = 1.84mA.

This set of Analog Circuits Questions and Answers for Freshers focuses on “Characteristic Equation of Diode 2”.

1. Find the current I if both diodes are identical. Voltage V = 0.8V and let the reverse saturation current be 10 -9 A.

analog-circuits-questions-answers-freshers-q1

a) 4.8mA

b) 3.2mA

c) 2.5mA

d) 7mA

Answer: a

Explanation: Since both diodes are identical V D = 0.8/2 = 0.4V

Equation for diode current

analog-circuits-questions-answers-freshers-q2a

where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since in this question ideality factor is not mentioned it can be taken as one. Take V T as 0.026 which is the standard value.

Hence current through one diode is 10 -9 x(e 0.4/0.026 ) = 4.8mA.

2. Find voltage VOUT if the reverse saturation current of the diode is 1.1×10 -8 A, the cut-in voltage of diode is 0.6V and assume the temperature as 25 o C.

analog-circuits-questions-answers-freshers-q2

a) 0.235V

b) 0.3148V

c) 0.456V

d) 0.126V

Answer: b

Explanation: Equation for diode current

analog-circuits-questions-answers-freshers-q2a

where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since in this question ideality factor is not mentioned it can be taken as one. Take V T as its standard value 0.026V.

Voltage V D = ηV T ln(I/I O + 1) = 1 x 0.0257ln (2 x 10 -3 /(1.1 x 10 -9 ))+1) = 0.0257ln = 0.3704 V.

3. The current Ix in the circuit is 1mA then find the voltage across diode D1. The resistance R1 is 1KΩ. Assume the reverse saturation current is 10 -9 A. Voltage across resistor in this condition was 0.4V. Take V T of diode as 0.026V.

analog-circuits-questions-answers-freshers-q3

a) 2.3mA

b) 3.2mA

c) 5.2mA

d) 4.6mA

Answer: c

Explanation: Since voltage drop across diode is 0.4V current through resistor is 0.4/1k = 0.4mA

Current through diode

analog-circuits-questions-answers-freshers-q2a

where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since ideality factor is not given take it as one.

Current through diode I = 10 -9 x (e 0.4/0.026 ) = 4.8mA

Total current = 4.8mA+0.4mA = 5.2mA.

4. Find the current Ix if the voltage across the diode is 0.5V. The reverse saturation current of diode 10 -11 A, the cut-in voltage of diode is 0.6V. Assume that the temperature at which diode operates is 25°C. The resistance R1=2KΩ.

analog-circuits-questions-answers-freshers-q3

a) 3.97mA

b) 4.51mA

c) 2.45mA

d) 3.05mA

Answer: d

Explanation: Since voltage drop across diode is 0.5V current through resistor is 0.5/2k = 0.25mA

Current through diode

analog-circuits-questions-answers-freshers-q2a

where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since ideality factor is not given take it as one.

Current through diode I = 10 -11 x (e 0.5/0.0257 ) = 2.8mA

Total current = 2.8mA + 0.25mA = 3.05mA.

5. If the current I is 2mA then find the temperature at which diode operates. The cut-in voltage of diode is 0.6V. The reverse saturation current of diode is 10 -9 A. Resistance R is 1.3KΩ.

analog-circuits-questions-answers-freshers-q5

a) 45.85°C

b) 50.47°C

c) 60.26°C

d) 56.89°C

Answer: a

Explanation: Equation for diode current

analog-circuits-questions-answers-freshers-q2a

where I 0 = reverse saturation current

η = ideality factor

V T = thermal voltage

V = applied voltage

Since in this question ideality factor is not mentioned it can be taken as one.

V D = 3- = 0.4V

analog-circuits-questions-answers-freshers-q5b

V T = T/11600

Thus Temperature, T = 11600×0.0275 = 319 Kelvin = 45.85°C.

6. If the temperature increases 10°C, the ratio of final reverse saturation current to initial reverse saturation current is _______

a) 1

b) 2

c) 1.5

d) 3

Answer: b

Explanation: The equation relating final reverse saturation current (I o2 ) to initial reverse saturation current (I o1 ) is given by

I o2 = 2 I o1 Where ∆T is temperature change

Ratio will be 2 = 2 1 = 2.

7. The reverse saturation current of a diode at 25°C is 1.5 x 10 -9 A. What will be the reverse current at temperature 30°C?

a) 3 x 10 -9 A

b) 2 x 10 -9 A

c) 2.12 x 10 -9 A

d) 1.5 x 10 -9 A

Answer: c

Explanation: The equation relating final reverse saturation current to initial reverse saturation current (I o1 ) is given by

I o2 = 2 I o1 Where ∆T is temperature change

Here ∆T = 5, Therefore, I o2 = 25/10 Io1 = 1.414 x 1.5 x 10 -9 A = 2.121 x 10 -9 A.

8. How much times reverse saturation current will increase if temperature increases 15 o C?

a) 2.52

b) 4.62

c) 4.12

d) 2.82

Answer: d

Explanation: The equation relating final reverse saturation current (I o2 ) to initial reverse saturation current (I o1 ) is given by

I o2 = 2 I o1

Where ∆T is temperature change

Ratio is 2 15/10 = 2.82.

9. The input voltage V1 of the circuit the circuit is 2V and resistor has a resistance of 1KΩ. The cut-in voltage of the silicon diode is 0.7V and the reverse saturation current is 10 -8 A. The temperature at which diode operates is 30°C. The voltage across resistor when diode starts conducting is _________________

analog-circuits-questions-answers-freshers-q9

a) 0.7V

b) 1.3V

c) 0.306V

d) 1.7V

Answer: b

Explanation: V1 = IR 1 + V D

For silicon diode, cut-in voltage is 0.7V.

Hence IR 1 = 2-0.7 = 1.3V

Drop across the resistor is 1.3V.

10. If V1 is 5V and resistance R 1 is 5KΩ and the cut-in voltage of the diode is 0.7V, what will be the voltage V out across the diode? Take reverse saturation current as 10 -8 A and operating temperature as 25°C.

a) 0V

b) -4.5V

c) -5V

d) -3.2V

Answer: c

Explanation: Since diode is in reverse bias mode voltage across diode will be almost the same as the applied voltage. Since the current in the circuit is in micro amperes voltage drop at R 1 is negligible.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Resistance Level”.

1. What is quiescent point or Q-point?

a) Operating point of device

b) The point at which device have maximum functionality

c) The point at which current equal to voltage

d) The point of V-I graph where slope is 0.5

Answer: a

Explanation: Quiescent point of a device represents operating point of a device. For a diode quiescent point is determined by constant DC current through the diode. The Q-point is the DC voltage or current at a specified terminal of an active device with no input applied. A bias circuit is used to supply this steady voltage/current.

2. The reciprocal of slope of current-voltage curve at Q-point gives _____________

a) AC resistance

b) Nominal resistance

c) Maximum dynamic resistance

d) Minimum impedance

Answer: a

Explanation: Reciprocal of slope of I-V graph at q-point gives AC or dynamic resistance. The inverse of slope will be change in voltage by change in current which is known as dynamic resistance.

3. As the slope of I-V graph at the Q point increases, AC resistance will _____________

a) Increase

b) Decrease

c) Either increase or decrease

d) Neither increase nor decrease

Answer: b

Explanation: Slope of I-V graph at q-point is reciprocal of dynamic or AC resistance. Therefore, as slope increases resistance decreases.

4. Static resistance of a diode is ____________

a) Resistance at the q-point, ΔV D /ΔI D

b) Maximum AC resistance

c) Minimum AC resistance

d) Resistance at operating point, V D /I D

Answer: b

Explanation: Static or DC resistance of a diode is the resistance offered by a diode at its q-point. DC resistance represents steady state. That is, it is calculated by treating current and voltage as constants.

5. Average AC resistance and dynamic resistance are ____________

a) Always Equal

b) Never equal

c) Both represents same quantity

d) Calculated from V-I graph

Answer: d

Explanation: Average AC resistance and dynamic or AC resistance are not exactly the same. They both measure the resistance in different ways. AC resistance is slope of the tangent of the curve of characteristic graph at Q-point. But average AC resistance is measured by measuring the slope of straight line between the limits of operation.

6. After cut-in voltage AC resistance of diode ____________

a) Slightly decreases

b) Decreases exponentially

c) Slightly increases

d) Increases exponentially

Answer: b

Explanation: After cut-in voltage current exponentially increases with small increase in voltage. This will considerably reduce resistance.

7. DC resistance of diode is measured at ____________

a) Knee current

b) Cut-in voltage

c) Q-point

d) Reverse breakdown point

Answer: c

8. Determine DC resistance of a diode described by characteristic graph at I D = 10mA.

analog-circuits-questions-answers-resistance-level-q8

a) 90 Ω

b) 111.1 Ω

c) 101.0 Ω

d) 100 Ω

Answer: a

Explanation: Static or DC resistance is the resistance of a diode at its operating point.

That is DC resistance = 0.9/10mA = 0.9×1000/10 = 90Ω.

9. For a diode, at 10mA DC resistance is 70Ω. The voltage corresponding to 10mA will be ____________

a) 0.5V

b) 0.6V

c) 0.7V

d) 0.8V

Answer: c

Explanation: Static or DC resistance is the resistance of a diode at its operating point.

Resistance = voltage/current

Therefore, voltage = current x resistance = 10mA x 70 = 0.7V

10. Calculate the DC resistance of diode at VD= -10V from the characteristic graph given below.

analog-circuits-questions-answers-resistance-level-q8

a) 1MΩ

b) 10MΩ

c) 15MΩ

d) 5MΩ

Answer: b

Explanation: Static or DC resistance is the resistance of a diode at its operating point.

Static resistance at -10V = 10V/current at -10V = 10/1µA = 10MΩ.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Ideal Diode Model – 1”.

1. In ideal diode model diode in forward bias is considered as a ___________

a) Resistor

b) Perfect conductor

c) Perfect insulator

d) Capacitor

Answer: b

2. In ideal diode model diode in reverse bias is considered as a ___________

a) Resistor

b) Perfect conductor

c) Perfect insulator

d) Capacitor

Answer: c

3. Voltage drop produced by a diode at forward bias in ideal diode model is equal to ___________

a) 0.7V

b) 0.3V

c) 1V

d) 0V

Answer: d

4. The current I through the circuit if we consider diode in ideal diode model.

analog-circuits-questions-answers-ideal-diode-model-1-q4

a) 3mA

b) 3A

c) 1A

d) 0.4mA

Answer: a

Explanation: In ideal diode model the diode is considered as a perfect conductor in forward bias and perfect insulator in reverse bias. That is voltage drop at forward bias is zero and current through the diode at reverse bias is zero. Since diode is forward biased current

I = = 3mA.

5. The voltage VOUT across the ideal diode if VIN is-5V and resistance R1=10KΩ is ___________

analog-circuits-questions-answers-ideal-diode-model-1-q5

a) -5V

b) 0V

c) -2.5V

d) 2.5V

Answer: a

6. The current I through the circuit I if voltage v = -3V is _______________

analog-circuits-questions-answers-ideal-diode-model-1-q6

a) 0A

b) 3A

c) 1.5A

d) 6A

Answer: a

7. If current source I produces a current of 1mA and resistance R=3kΩ, then what is the voltage across the resistor given that diode is ideal?

analog-circuits-questions-answers-ideal-diode-model-1-q7

a) 0V

b) 1V

c) 3V

d) 1.5V

Answer: a

Since current forward biases the diode it acts as a conductor so current through resistor is zero so voltage is zero. Therefore, voltage across resistor is zero.

8. If resistance R 1 is 10KΩ, V 2 = 2V, V 1 = 3V and the diode is ideal, then the current I through the circuit will be ___________

analog-circuits-questions-answers-ideal-diode-model-1-q8

a) 0.3mA

b) 0.6mA

c) 0.7mA

d) 0.1mA

Answer: d

Since the diode is in reverse bias, it can be considered open and no current flows through it. Then effective voltage becomes 3-2 = 1V so current is 1/10K = 0.1mA.

9. If resistance R 1 is 10K, V 2 = – 2V, V 1 = 3V and the diode is ideal then the current I through the circuit will be _________

analog-circuits-questions-answers-ideal-diode-model-1-q8

a) 0.2mA

b) 0A

c) 0.5mA

d) 0.3mA

Answer: d

The voltage V 2 forward biases the diode so in effect V 2 Vanishes. Also V 1 is in reverse bias to the diode so it will not pass through diode. Therefore, effective current will be

= 0.3mA.

10. What will be the voltage Vout if V A = 3V and V B = -5V and the diodes are ideal?

analog-circuits-questions-answers-ideal-diode-model-1-q10

a) 5V

b) 3V

c) 2V

d) 0V

Answer: b

This set of Analog Circuits Interview Questions and Answers for freshers focuses on “Ideal Diode Model – 2”.

1. Find the voltage across the resistor R if VA = -3V and V B = -5V. Use ideal diode model assumption.

analog-circuits-questions-answers-ideal-diode-model-1-q10

a) 0V

b) -3V

c) -5V

d) -4V

Answer: a

Explanation: In an ideal diode model, the diode is considered as a perfect conductor in forward bias and perfect insulator in reverse bias. That is voltage drop at forward bias is zero and current through the diode at reverse bias is zero.

Since both the diodes are in reverse bias mode, current through the diode is zero and we can consider the diode as an open circuit. So there is no voltage drop across resistor R.

2. Find current I if voltage V = 5V, V B = 2V, R 1 & R 2 = 2K. Use ideal diode model assumption.

analog-circuits-interview-questions-answers-freshers-q2

a) 1.5mA

b) 1.375mA

c) 2mA

d) 3mA

Answer: d

The diode is forward biased and can be considered as a short circuit.

So voltage across R 1 is V-V B .

That is 3V. Therefore, current through R 1 = 3V/2k = 1.5mA.

Current through R 2 = 3/2K = 1.5mA.

Therefore, total current I = 1.5+1.5 = 3mA.

3. Find current I if V = 5V and -5V when V B = 2V, R 1 = 2KΩ, R 2 = 4KΩ and the diode is ideal.

analog-circuits-interview-questions-answers-freshers-q3

a) 0A and 1.3mA

b) 1.231mA and 0.33mA

c) 3.25mA and 0A

d) 1.58mA and 0A

Answer: c

When V=5V, the diode is forward biased and can be considered as a short circuit.

Current through resistor R 1 = V/2k = 2.5mA.

Current through resistor R 2 = (V – V B )/4k = 0.75mA.

So total current is 3.25mA.

At V = -5V, diode is reverse bias So the current is zero.

4. The output voltage V if V in = 3V, R=5KΩ, V B = 2V in a ideal diode is __________

analog-circuits-interview-questions-answers-freshers-q4

a) 1V

b) 4V

c) 3V

d) 2V

Answer: c

The diode above is reverse biased and ideally can be considered as an open circuit. So output is the voltage V in = 3V.

5. In the circuit below V B = 2V, V in = 5V. The voltage V across resistor R in ideal diode is __________

analog-circuits-interview-questions-answers-freshers-q5

a) 5V

b) 2V

c) 3V

d) 0V

Answer: d

Since the diode is in reverse bias, no current flows through it and thus through the resistor too. Thus voltage across resistor is zero.

6. In the circuit V in = 4V, V B = 3V, R = 5K. The voltage across diode V is __________

analog-circuits-interview-questions-answers-freshers-q6

a) 1V

b) 4V

c) 3V

d) 7V

Answer: a

Since V in reverse biases the diode and V B forward biases the diode So total voltage across diode is V in -V B .

7. In the circuit below V in = 4V, R = 2K and V B = 2V. In these conditions the voltage across ideal diode V is __________

analog-circuits-interview-questions-answers-freshers-q7

a) -4V

b) -2V

c) 2V

d) 0V

Answer: d

Since net voltage V in – V B = 2V forward biases the diode, it can be considered as a short circuit and the voltage across diode is zero.

8. In the circuit shown in below I = 2mA, V B = 2V and R = 2K. The voltage V will be _________

analog-circuits-interview-questions-answers-freshers-q8

a) 2V

b) -2V

c) -4V

d) 1V

Answer: b

Assuming diode to be forward biased, KCL can’t be applied correctly at the node. Hence diode is reverse biased. The diode can be considered as an open circuit and the current flows through resistor R only. Hence voltage V = -2V.

9. In the circuit shown in below I = 2mA, V B = 2V and R = 2K. The voltage V will be ____________

analog-circuits-interview-questions-answers-freshers-q9

a) 2V

b) 3V

c) 6V

d) 5V

Answer: a

Consider that diode is reverse biased. But, that does not satisfy KCL at the node. No incoming current is present. Hence diode is forward biased and short-circuited. Hence the output voltage = V = VB = 2V.

10. For circuit shown below V in = 3V, R 1 = 6K, R 2 = 2K. The voltage V will be ________

analog-circuits-interview-questions-answers-freshers-q10

a) 3V

b) 0.75V

c) 1V

d) 1.134V

Answer: a

Since diode is forward biased entire voltage will appear across R 2 .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Piecewise Linear Model of Diode – 1”.

1. After cut-in voltage in piecewise linear model diode act as a ___________

a) Resistor

b) Capacitor

c) Conductor

d) Insulator

Answer: a

Explanation: After cut –in voltage diode act as a resistor in piecewise linear mode. In normal operation diode current is exponentially related to voltage.

2. Reverse biased condition of a diode in piecewise linear model is equivalent to __________

a) Resistor

b) Capacitor

c) Conductor

d) Insulator

Answer: d

Explanation: For a diode in reverse bias mode current through the diode is in micro amperes or nano amperes. Hence we can assume it as zero. In piecewise linear model reverse current is assumed to zero. That is, as an insulator.

3. Voltage drop produced by a diode in piecewise linear mode is __________

a) Constant and equal to knee voltage

b) Varies linearly with voltage after knee voltage

c) Varies exponentially with voltage after knee voltage

d) Constant and equal to twice of knee voltage

Answer: b

Explanation: Voltage drop produced by diode in piecewise linear model is not constant. Since it contains effect of resistor, the diode voltage linearly increases as input voltage increases.

4. In the given circuit voltage V = 2V.cut-in voltage of diode is 0.7V. Forward resistance is 10Ω. The current I through the circuit is ____________

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q4a

a) 0.235mA

b) 1.29mA

c) 1.63mA

d) 2.27mA

Answer: d

Explanation: Since diode is in forward bias mode it can replaced by the equivalent circuit

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q4

I = (V-V D )/R 1 +RD

= /1010 = 2.27mA.

5. In the given circuit input voltage Vin is 3V and V 2 is 1V. The resistance R 1 is 1.5K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The current I will be __________

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q5a

a) 2.03mA

b) 0.23mA

c) 1.58mA

d) 1.33mA

Answer: d

Explanation: Since both voltage sources are reverse bias to the diode, diode in the circuit disappears and equivalent circuit becomes as follows

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q5

So current I = V 1 -V 2 /R

= 3-1/1.5k = 1.33mA.

6. In the given circuit input voltage V 1 is -3V and V 2 is -1V. The resistance R 1 is 1K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The approximate current I is _________

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q5a

a) -1mA

b) -2mA

c) -0.2mA

d) -0.1mA

Answer: b

Explanation: Since both voltage sources are in forward bias to diode, the equivalent circuit will be as follows

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q6

Since voltage across diode is 1V. current I = -3+1/1k = -2mA.

7. In the given circuit input voltage V is 2V and V B is 1V. The resistance R 1 and R 2 is 1K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The current I will be

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q7a

a) 0.29mA

b) 0.21mA

c) 0.36mA

d) 0.15mA

Answer: a

Explanation: Since V-V B = 1V forward biases the diode, we can use equivalent circuit of diode as follows

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q7

Current through R 1 , I1 = 1V/R 1 = 1mA.

Current through R 2 , I2 = (1-V D )/(R 2 ¬+RD) = /1010 = 0.297mA.

8. In the given circuit input voltage V is 3V and V B is 1V. The resistance R 1 and R 2 is 1K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The current I will be

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q7a

a) 0.96mA

b) 2.13mA

c) 1.56mA

d) 1.23ma

Answer: c

Explanation: Since diode is in forward bias we can assume equivalent circuit model and assume following circuit

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q7

Let voltage across diode is V0 now voltage across branch is V-V0

Current I = (2-V 0 )/R 1 + (2-V 0 -V B )/R 2 = (2-V 0 )/1000+((1-V 0 ))/1000 …………………….

V0 = V D + IRD = 0.7+10I

Put this value in eq

That is, I = /1000+)/1000 => 1000I = 1.6 – 20I => 1020 I = 1.6

That is, I = 1.6/1020 = 1.56mA.

9. In the given circuit input voltage V is -3V and V B is 1V. The resistance R 1 and R 2 is 1K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The current I will be

analog-circuits-interview-questions-answers-freshers-q3

a) 1.2mA

b) 0mA

c) 0.8mA

d) 1mA

Answer: b

Explanation: If we suppose diode to be forward biased then voltage across R1 is -2.5V and current flows from bottom to top in that link. For source V B current flows the same but then KCL can’t be applied at the top node since all currents are incoming. Hence the diode is reverse biased and is an open circuit. No current flows through it and I=0.

10. In the given circuit input voltage Vin is 3V and V B is 1V. The resistance R is 1K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The current I will be?

analog-circuits-questions-answers-piecewise-linear-model-diode-1-q10

a) 1V

b) 3V

c) 2.3V

d) 1.3V

Answer: b

Explanation: If we consider diode as a short circuit, the voltage in circuit is thus 3-1=2V and current flows from top to bottom across diode. But that only happens in a reverse bias of the diode. Hence the diode is in reverse bias and open. Output voltage V=3V.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Piecewise Linear Model of Diode-2”.

1. In the given circuit input voltage V in is 3V and V B is 1.5V. The resistance R is 1.5K. Cut-in voltage of diode is 0.5V. Forward bias resistance is 10Ω. The Voltage V will be ____________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q1

a) 2.7V

b) 3V

c) 0.8V

d) 1.5V

Answer: b

Explanation: In piecewise linear model, we can consider diode as a voltage source of 0.5V along with an ideal diode. V IN being applied is 3V, which is greater than 1.5-0.5 V, and hence the diode is reverse biased and input appears at output.

2. In the circuit shown below voltage V in is 3V and V B is 2V. The resistor R is 1K. Cut-in voltage of diode is 0.7V. The voltage V is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q2

a) 0.3V

b) 1V

c) 3V

d) 0V

Answer: d

Explanation: In piecewise linear model, we can consider diode as a voltage source of 0.7V along with an ideal diode. V IN being applied is 3V, which is greater than 2-0.7 V, and hence the diode is reverse biased and considering it open, no output is obtained.

3. In the circuit shown below voltage V in is -3V and V B is -2V. The resistor R is 1K. Cut-in voltage of diode is 0.7V. Forward bias resistance is 10Ω. The voltage V is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q2

a) -0.29V

b) -4.25V

c) 4.25V

d) 2.9V

Answer: b

Explanation: Effective voltage across diode is one volt. Hence diode is in forward bias mode. So we can apply equivalent circuit of diode.

Net voltage through R and RD is -3-2+0.7 = -4.3V

Current through the circuit is -4.3/ = -4.3/ = -0.00425A=-4.25 mA

Hence voltage across R is 1Kx = -4.25V.

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q3

4. In the circuit shown below current I is 2mA and V B is 1V. The resistor R is 1K. Cut-in voltage of diode is 0.7V. Forward bias resistance is 10Ω. The voltage V is __________

analog-circuits-interview-questions-answers-freshers-q9

a) 3V

b) 2V

c) 1V

d) 0.3V

Answer: a

Explanation: Since current source is reverse bias to the diode current passes through resistor R. Voltage across resistor R is 2mA x 1k = 2V. Since resistor and diodes are parallel net output voltage V is V B + voltage across resistor R = 1+2 = 3V.

5. In the circuit shown below current I is 2mA and V B is -1V. The resistor R is 1K. Cut-in voltage of diode is 0.7V. Forward bias resistance is 10Ω. The voltage V is __________

analog-circuits-interview-questions-answers-freshers-q9

a) 1.3V

b) 0.3V

c) 1V

d) 2V

Answer: c

6. In the circuit shown below voltage V in is 3V and V B is 1V. The resistor R 1 and R2 are 1K. Assume both diodes are identical. Forward bias resistance is 10Ω. Cut-in voltage of diode is 0.7V. The voltage V out is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q6

a) 1.235V

b) 0.234V

c) 1.314V

d) 1.564V

Answer: c

Explanation: Since D1 and D 2 are forward biased we can replace them with their equivalent diagram.

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q6a

Assume I be the current through the circuit. By kirchoff’s voltage rule,

V out = -V D +IRD+IR2 ————

Current through R 1 (V in -V out )/1k = (3-V out )/1k

Current through diode is (V in -V out -V D -V B )/RD = (0.3-V out )/10

Total current I = (3-V out )/1000+(1.3-V out )/10 = 1.330-1.010V out

Substitute this in eq

That is, V out = -0.7 + 1010(1.33-1.01V out )

1021V out = 1342. Therefore, V out = 1.314V.

7. In the circuit shown below voltage V in is -3V and V B is -1V. The resistor R 1 and R2 are 1K. Assume both diodes are identical. Forward bias resistance is 10Ω. Cut-in voltage of diode is 0.7V. The voltage V out is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q6

a) -2V

b) -3V

c) -1V

d) -.0.7V

Answer: b

Explanation: Since both diodes are in reverse bias mode applied voltage V in will appear on V out . Diode D1 and D 2 disappears and leaves the terminal as open.

8. In the circuit shown below voltage V in is 3V and V B is 1V. The resistor R 1 and R2 are 1K. Assume both diodes are identical. Forward bias resistance is 10Ω. Cut-in voltage of diode is 0.7V. The voltage V out is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q8

a) 1.14V

b) 1.23V

c) 0.32V

d) 1.34V

Answer: a

Explanation:

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q8a

Assume I be the current through the circuit. By kirchoff’s voltage rule,

V out = IR2 ————

Current through R 1 (V in -V out -V D )/1.01k = (2.3-V out )/1010

Current through diode D 2 is 0 since D 2 is in reverse bias mode.

current I = (2.3-V out )/1010

Substitute this in eq

That is, V out = (2.3-V out )/1010 x 1000 => 1.99V out = 2.27 => V out = 2.27/1.99 = 1.144V.

9. In the circuit shown below voltage V in is 3V and V B 1 is -1V and V B 2 is 1V. Assume both diodes are identical. Cut-in voltage of diode is 0.7V. Forward bias resistance is 10Ω. The voltage V out is __________

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q9

a) 0.6V

b) 1V

c) 1.7V

d) 2V

Answer: a

Explanation: In this condition both diodes are forward biased

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q9a

This circuit can be further reduced to by assuming V B as 1V

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q9b

By network analysis using kirchoff’s voltage rule current through RD 2 will be 0.09A.

The voltage in V out will be V B +V D -0.09×10 = 0.6V.

10. In the circuit shown below, cut-in voltage of diode is 0.7V. Forward bias resistance is 10Ω. The voltage V is?

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q10

a) 0.69V

b) 0.7V

c) 0.68V

d) 0.72V

Answer: d

Explanation: Since diode is in forward bias we can replace diode with voltage source of 0.7V and resistor of resistance 10Ω.

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q10a

V out will be IRD+V D = 2mAx10 + 0.7 = 0.72V.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Constant Voltage Drop Model-1”.

1. In constant voltage drop model diode in forward bias is considered as a ________________

a) Resistor

b) Perfect conductor

c) Perfect insulator

d) Capacitor

Answer: b

Explanation: In constant voltage drop model the diode is considered as a perfect conductor in forward bias and perfect insulator in reverse bias. That is voltage drop at forward bias is zero and current through the diode at reverse bias is zero. In this model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

2. In constant voltage drop diode in reverse bias is considered as a ___________

a) Resistor

b) Perfect conductor

c) Perfect insulator

d) Capacitor

Answer: c

Explanation: In constant voltage drop the diode is considered as a perfect conductor in forward bias and perfect insulator in reverse bias. That is voltage drop at forward bias is zero and current through the diode at reverse bias is zero. In this model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

3. The current I through the circuit if we consider diode in constant voltage drop model is? (Take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q3

a) 2mA

b) 2.5mA

c) 3.5mA

d) 1mA

Answer: b

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since D1 is in forward biased there will be a voltage drop of 0.5V. So net voltage will be 2.5V and hence current is 2.5mA.

4. The voltage across the diode V out if V in is -5V and resistance is 10K is? (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q4

a) -3V

b) 0V

c) -5V

d) -2.5V

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since diode is reverse biased entire voltage will appear across diode.

5. The voltage across the diode V out if V in is 5V and resistance is 10K is? (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q4

a) 5V

b) 0.5V

c) 2.5V

d) 0V

Answer: b

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since diode is forward biased and potential is greater than V D voltage across diode is V D .

6. The current I through the circuit I if voltage v is -3V is? (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q6

a) 10mA

b) 1mA

c) 3mA

d) 0mA

Answer: d

Explanation: In constant voltage drop model, in forward bias, the diode can be replaced as a cell and a short circuit, and in reverse bias as an open circuit. In above circuit, the diode is reverse biased, hence when open circuited, no current flows.

7. If current source produces a current of 1mA and resistance R is 3K then voltage across the resistor is ____________ (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q7

a) 3V

b) 0V

c) 0.5V

d) 0.3V

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

The diode is forward biased and drop across it is 0.5V. Maximum current flows through the diode and thus the voltage across diode is same as that across the resistor = 0.5V.

8. If resistance R 1 is 10K, V 2 = 2V, V 1 = 3V then the current I through the circuit will be ___________ (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q8

a) 0.3mA

b) 0.6mA

c) 0.7mA

d) 0.1mA

Answer: d

Since both voltage is reverse bias to diode the diode will disappear from the circuit. Then effective voltage becomes 3-2 = 1V so current is 1/10K = 0.1mA.

9. If resistance R 1 is 10K, V 2 = -2V, V 1 = -3V then the current I through the circuit will be ___________ (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q8

a) 0.5mA

b) 0.25mA

c) 2mA

d) 3mA

Answer: b

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since both voltage sources are forward biased the diode V 2 and diode can be replaced by a single cell of V D . So net voltage in the circuit is 2.5V. So the current will be 0.25mA.

10. What will be the voltage V out if V A = 3V and V B = -5V? (Use constant voltage drop model of diode and take V D as 0.5V)

analog-circuits-questions-answers-constant-voltage-drop-model-1-q10

a) 2.5

b) 3.5

c) -5.5

d) -4.5

Answer: a

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since first diode is forward biased and second diode reverse bias, we can ignore the second diode. Drop across the first diode is 0.5V and hence net voltage at output is 3-0.5=2.5V.

This set of Analog Circuits Questions and Answers for Experienced people focuses on “Constant Voltage Drop Model-2”.

1. What is voltage across the resistor R if V A = -3V and V B = -5V is _________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q1

a) 0V

b) -3V

c) -5V

d) -4V

Answer: a

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open. In above circuit both the diodes are reverse biased and can be considered as open circuit. Hence output voltage is 0V.

2. What is current I if voltage V = 5V, V B = 2V, R 1 & R 2 = 2K. (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q2

a) 1.25mA

b) 1mA

c) 2.75mA

d) 1.75mA

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since V in and V B are opposite net voltage is 3V. Voltage at R 1 is 3V so current is 1.5mA. Voltage at R 2 is 3-0.5 = 2.5V. So the current is 1.25mA. The net current is 2.75mA.

3. Current I if V = 5V and -5V when V B = 2V, R 1 = 2K, R 2 = 4K respectively are __________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q3

a) 1.3mA, 0.23mA

b) 2.875mA, 0mA

c) 2mA, 0mA

d) 1.423mA, 0 mA

Answer: b

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

When V=5V, diode is in forward bias and net total voltage becomes 4.5V across R1.

Current through branch 1 will be 4.5V / 2K = 2.25mA.

Current through branch 2 will be /4K = 0.625mA.

So net current is sum of these two. Therefore, net current is 2.875mA.

When V = -5V, the diode is reverse biased and net current flowing is zero.

4. The output voltage V if V in = 3V, R = 5K, V B = 2V is ___________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q4

a) 0V

b) 2V

c) 1.5V

d) 3.5V

Answer: d

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since V in is reverse bias to the diode all voltage will appear across diode and no current flows. Thus, voltage across diode is V in -V B = 1V. Net voltage V=3V.

5. In the circuit below V B = 2V, V in = 5V. The voltage V across resistor R is ________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q5

a) 0V

b) 2.5V

c) 1.5V

d) 3V

Answer: a

Explanation: The diode is in reverse bias and voltage across diode is -3V. Hence the voltage across the resistor is V in +V D -V B =5-3-2=0V.

6. In the circuit V in = 4V, V B = 3V, R = 5K. The voltage across diode V is _________

(Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q6

a) 0V

b) 0.5V

c) 1V

d) 1.5V

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open. The diode here is in reverse bias and may be considered as an open circuit. Hence, the voltage across the diode is 4-3=1V.

7. In the circuit below V in = 4V, R = 2K and V B = 2V. In these conditions the voltage across diode V is _________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q7

a) 2.5

b) 4.5

c) 0.5

d) 1.5

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open. Since diode is forward biased it will produce a voltage drop of V D .

8. In the circuit shown in below I = 2mA, V B = 2V and R = 2K. The voltage V will be ________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q8

a) 0V

b) 2.5V

c) 6V

d) 3.5V

Answer: b

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since current source forward bases the diode voltage drop across diode is V D . So net voltage output is V D +V B .

9. In the circuit shown in below I = 2mA, V B = 2V and R = 2K. The voltage V will be ________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q9

a) 4V

b) 3V

c) 6V

d) 5.5V

Answer: c

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since current source reverse biases diode, all current pass through resistor R. So voltage across resistor is 4V. Since voltage source cannot produce current due to lack of closed circuit total voltage at the output is 6V.

10. For circuit shown below V in = 3V, R 1 = 6K, R 2 = 2K. The voltage V will be ________ (Use constant voltage drop model assumption and take V D = 0.5V)

analog-circuits-questions-answers-experienced-q10

a) 2V

b) 3V

c) 3.5V

d) 2.5V

Answer: d

Explanation: In constant voltage drop model at forward bias diode can be replaced as a cell and in reverse bias diode can be avoided by considering the terminals are open.

Since diode is forward biased and parallel to resistor R 1 voltage drop across diode is V D . So net voltage equals to V in – V D .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Drift and Diffusion Current”.

1. Drift current is due to ___________

a) Applied electric field over a given distance

b) Random motion of electrons

c) Random motion of holes

d) Recombination of holes and electrons

Answer: a

Explanation: Drift current is a type of electric current due to the movement of charge carriers which occurs because of applied electric field across the p-n junction often stated as electromotive force over a given distance.

2. Diffusion current is due to ___________

a) Applied electric field over a given distance

b) Variation in carrier concentration

c) Random motion of holes

d) Recombination of holes and electrons

Answer: b

Explanation: Diffusion current is due to the actual movement of carrier charges from one side to another. The direction of diffusion depends on the slope of the carrier concentration that is the gradient of density of carriers.

3. What makes up the total current in a semi-conductor?

a) Only diffusion current

b) Only drift current

c) Drift+diffusion current

d) Drift+diffusion+biasing current

Answer: c

Explanation: In an unbiased semi-conductor the drift current is balanced by diffusion current and hence there is no current flowing in the semi-conductor in this condition, but in biased condition both these currents are unbalanced and hence the total current flowing is the vector sum of both drift and diffusion current.

4. Conductors also have drift current.

a) True

b) False

Answer: a

Explanation: In good conductors there are many electrons moving freely in the conduction band and thus on application of an electric field these free electrons move whereas in semi-conductors drift current flows because of less number of free electrons.

5. The equation J n =qnµ n E (A/cm 2 ) represents___________

a) Drift current

b) Drift current density

c) Diffusion current

d) Diffusion current density

Answer: b

Explanation: Here ‘q’ is the charge on carrier, ‘n’ is the number of carriers, ‘µn’ is the mobility constant and ‘E’ is the electric field intensity. These are the factors which comprise the drift current and hence the equation represents the drift current density.

6. Is the statement “Diffusion current produces Drift current” true?

a) Yes

b) No

c) Cannot Say

d) Insufficient Data

Answer: a

Explanation: The movement of charge carriers is diffusion current and this movement produces an electric field which is the root cause of drift current. This is also proved by the fact that both drift and diffusion current are equal and opposite in an unbiased semi-conductor.

7. What is the average net velocity in the direction of the electric field?

a) Velocity of electrons

b) Velocity of holes

c) Drift velocity

d) Collision velocity

Answer: c

Explanation: The carriers accelerate in the direction of electric field between collisions but for each time interval τc there is a collision which randomises the velocity of the carrier. This average net velocity in the direction of electric field is Drift velocity.

8. What is mobility?

a) Ease of carrier drift

b) Ease of current flow

c) Ease of access to the junction

d) Ease of movement

Answer: a

Explanation: Mobility is the ease with which carriers can drift. The higher the collision time, the greater is the mobility also the lighter is the carrier, the greater is its mobility. Thus on the application of an electric field it’s easier for carriers to drift.

9. Why does a gradient occur in a semi-conductor?

a) Because of current flow

b) Because of diffusion current

c) Because of drift current

d) Because of difference in concentrations

Answer: d

Explanation: As there is a different level of doping in the p and n regions of a semi-conductor, the carriers move from a region of high concentration to a region of low concentration giving rise to diffusion current.

10. How does diffusion current produce the depletion region?

a) The diffusion causes the holes and electrons to collect at the junction

b) The diffusion is because of the depletion region

c) The depletion region aids diffusion

d) The statement is not true

Answer: a

Explanation: The diffusion of carriers from one side to another makes the holes and electrons to collect on either side of the junction creating the depletion region. This is further widened or shortened depending on the biasing.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Transition Capacitance”.

1. Which of the following is not known as transition capacitance?

a) Junction capacitance

b) Space-Charge capacitance

c) Diffusion capacitance

d) Barrier capacitance

Answer: c

Explanation: Transition capacitance is the capacitance exhibited by a diode due to the p-side and n-side of the diode is separated by a distance of depletion width same as in an electrolytic capacitor. It occurs in a reverse biased diode. The other name for this is Junction capacitance, Space-Charge capacitance, Barrier capacitance, Depletion region capacitance. Diffusion capacitance is due to the transport of charge carriers between the two terminals of the device. It occurs in a forward biased diode.

2. Which of the following is not known as transition capacitance?

a) Depletion region capacitance

b) Space-Charge capacitance

c) Nominal capacitance

d) Junction capacitance

Answer: c

3. Transition capacitance of a diode is directly proportional to ____________

a) Area of cross section

b) Width of depletion region

c) Reverse voltage applied across the terminals

d) Drift current

Answer: a

The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section.

4. Transition capacitance of a diode is inversely proportional to __________

a) Area of cross section

b) Width of depletion region

c) Relative permittivity

d) Drift current

Answer: b

The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section.

5. As reverse bias voltage increases transition capacitance __________

a) Increases

b) Decreases

c) Doesn’t depend upon voltage

d) Constant

Answer: b

The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

As reverse bias increases depletion width also increases hence transition capacitance decreases.

6. What is the dependence of the transition capacitance on relative permittivity?

a) Inversely proportional to relative permittivity

b) Directly proportional to relative permittivity

c) Independent of relative permittivity

d) Directly proportional to relative permittivity with a degree of 2

Answer: b

The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

Relative permittivity is directly proportional to the permittivity of the material.

7. For a diode the transition capacitance was 10pF. The depletion width changed from 1µm to 10 µm. All other conditions remain unchanged. The new diode capacitance is __________

a) 5pF

b) 1.414pF

c) 1pF

d) 10pF

Answer: c

Explanation: The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

Since depletion width increased 10 times and all other quantities are the same, the capacitance decrease by 10 times.

8. For a diode the transition capacitance was 15pF. The diode is replaced with another diode of same material with twice cross sectional area. Terminal voltage remains unchanged. The capacitance of new diode is __________

a) 15pF

b) 30pF

c) 60pF

d) 7.5pF

Answer: b

Explanation: The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

Since A becomes 2A capacitance also doubles.

9. A diode is replaced with another diode of different material. The ratio of relative permittivity of new material to old is 0.5. The initial capacitance was 20pF, then final capacitance will be __________

a) 15pF

b) 20pF

c) 10pF

d) 2pF

Answer: c

Explanation: The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

Since permittivity becomes half capacitance also halves.

10. A diode had a transition capacitance of 1pF and depletion width of 1 µm. The capacitance changes to 10 pF when the depletion width changes. The final depletion width is __________

a) 10 µm

b) 0.1 µm

c) 1 µm

d) 100 µm

Answer: b

Explanation: The equation of transition capacitance = ƸA/W

Where Ƹ = permittivity of the material of diode, W = depletion width

A = area of cross section

Since depletion width and capacitance are inversely proportional

Depletion width decreases to 0.1 µm.

11. Which of these is the odd one in the choices?

a) Transition capacitance

b) Diffusion capacitance

c) Space charge capacitance

d) Depletion layer capacitance

Answer: b

Explanation: Transition capacitance is the junction capacitance in a reverse biased diode. The rate of change of immobile charges wrt a change in reverse bias voltage is called transition capacitance, or space charge or depletion layer capacitance.

12. Consider two diodes, A is step graded, B is linear graded. Find the ratio of the capacitance of A to B, when the applied voltage in reverse bias is 64V.

a) 0.2

b) 2

c) 0.5

d) 5

Answer: d

Explanation: In A, C A ∝ \(\frac{1}{\sqrt{V}}\)

C B ∝ \(\frac{1}{\sqrt[3]{V}}\)

\(\frac{C_A}{C_B} = \frac{4}{8} = \frac{1}{2}\) = 0.5.

13. Consider 2 reverse biased diodes. If the ratio of applied reverse bias voltages is 0.5, find the ratio of transition capacitances of the 2 diodes.

a) 2

b) 4

c) 1.31

d) 2.6

Answer: c

Explanation: \

^{\frac{1}{2.5}} \)

\(\frac{C_{T1}}{C_{T2}} = 2^{\frac{1}{2.5}}\) = 1.31.

14. The transition capacitance depends on the forward current of the diode.

a) True

b) False

Answer: b

Explanation: Diffusion capacitance is present in the forward bias and transition capacitance is present in reverse bias. Hence it is diffusion capacitance which is proportional to the forward current of diode, not transition capacitance.

15. Capacitance per unit area at no reverse bias is 2 pF/cm 2 . For a step graded diode of area 5cm 2 , what is net capacitance at 99 V reverse bias voltage?

a) 2pF

b) 5pF

c) 0.1pF

d) 1pF

Answer: d

Explanation: C o =2pf/cm 2

C = C O *A/ 0.5 = 2pF x 5/10 = 1pF.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Diffusion Capacitance”.

1. On which of these does the diffusion capacitance of a diode not depend upon?

a) Forward current

b) Dynamic conductance

c) Doping concentration

d) Reverse resistance

Answer: d

Explanation: C D = \(\frac{εA}{W}\) which means C D ∝ \(\frac{1}{W}\). Thus, C D ∝ \(\frac{1}{\sqrt{Doping}}\) concentration

C D = τg = \(\frac{τ}{r} = \frac{τI_F}{ηV_T}\)

where τ = carrier life time, g = dynamic conductance, I F = forward current.

2. If the diffusion capacitance is directly proportional only to the lifetime of holes in N side then ________

a) The diode is a p + n junction diode

b) The diode is a pn + junction diode

c) The diode is a p + n + diode

d) The diode can have any type of pn junction

Answer: a

Explanation: Diffusion capacitance is proportional to the carrier lifetime of injected minority carriers / excess minority carriers. Since it is proportional to the lifetime of holes in N side, this means the N side is the minority and P side is the majority. Hence it is a p + n diode.

3. Diffusion capacitance is larger than transition capacitance.

a) True

b) False

c) Both are same

d) Depends on doping concentrations

Answer: b

Explanation: Diffusion capacitance occurs in a forward biased diode, transition capacitance is easy to see in reverse bias. C D > C T for a forward bias junction. In reverse bias though, C D may be neglected compared to C T .

4. In a diode, the change in voltage being applied across it is 2V. The change in minority carriers outside the depletion region is 1.2×10 -8 . Find diffusion capacitance.

a) 6 pF

b) 6 μF

c) 1.2 nF

d) 6nF

Answer: d

Explanation: Diffusion capacitance = \(\frac{dQ}{dV}\)

C D = \(\frac{1.2 x 10^{-8}}{2}\)

C D = 6 nF.

5. The minority charge concentration can be represented as Q = V 2 – 33V. If the voltage being applied is now 5V, find the diffusion capacitance.

a) 1μF

b) 0.1μF

c) 10μF

d) 0.9μF

Answer: b

Explanation: Q = – \(\frac{V^{-9}}{9}\)

C D = \(\frac{dQ}{dV}\) = V -10 = 1.024 x 10 -7

C D = 0.1μF.

6. Consider two almost similar diodes, whose diffusion capacitances are C1 and C2, and doping concentrations of 1020 /cubic centimeter and 1016/cubic centimeter. Find \

100

b) 0.01

c) 10000

d) 0.0001

Answer: b

Explanation: C ∝ \(\frac{1}{\sqrt{Doping}}\)

\(\frac{C1}{C2} = \sqrt{\frac{10^{16}}{10^{20}}} = \sqrt{\frac{1}{10^4}} = \frac{1}{100}\)

\(\frac{C1}{C2}\) = 0.01.

7. If the relative permittivity of a diode remains constant, its area is doubled and its doping concentration is quadrupled. What is its new diffusion capacitance, of originally it was C D ?

a) 4C D

b) 2C D

c) 3C D

d) C D

Answer: a

Explanation: C D = \(\frac{εA}{W}\) ∝ A.\(\sqrt{Doping}\)

C D ‘ = \(\frac{ε2A}{W}\) ∝ 2A.2 2A.\(\sqrt{4Doping}\) = 4 C D

C D ‘ = 4C D .

8. Consider a step graded diode, which has built in voltage 0.7V, and depletion width 2μm. Depletion width is W2 when a reverse bias voltage of 11.3 V is applied. Find W2?

a) 8.28μm

b) 8μm

c) 4.14 μm

d) 9.88 μm

Answer: a

Explanation: \(\frac{W1}{W2} = \sqrt{\frac{V1}{V2}} = \sqrt{\frac{0.7}{12}}\)

W2 = 4.14*2 = 8.28μm.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Load Line Analysis”.

1. From the circuit and the diode characteristics given alongside, and assuming R=2k, what is the value of diode voltage at the operating point?

analog-circuits-questions-answers-load-line-analysis-q1

a) 0.78 V

b) 10 V

c) 0 V

d) 1v

Answer: a

Explanation: On drawing the load line with the equation: V D = E D + I D R D , we get the operating point with the value of at voltage at around 0.7-0.8 V. Hence, V Dq =0.78 V.

2. From the circuit and the diode characteristics given and assuming R=1k, what is the value of diode current at operating point?

analog-circuits-questions-answers-load-line-analysis-q1

a) 20 mA

b) 9.3 mA

c) 0 mA

d) 10 mA

Answer: b

Explanation: On drawing the load line with the equation: V D = E D + I D R D , we get the operating point with the value of current at around 9.2-9.4 mA. Hence, I Dq =9.3 mA.

3. From the circuit and the diode characteristics given and assuming R=1k, what is the value of voltage across the resistor at operating point?

analog-circuits-questions-answers-load-line-analysis-q1

a) 10 V

b) 0 V

c) 9.3 V

d) 10.7 V

Answer: c

Explanation: We know that VR=I D R = 9.3 x 1 = 9.3 V.

4. From the given load line characteristics, what is the relation between R1 and R2 , assuming constant source EMF?

analog-circuits-questions-answers-load-line-analysis-q4

a) R1 > R2

b) R1 = R2

c) R1 < R2

d) R1 >= R2

Answer: c

Explanation: Here, the y-intercept=E/R hence, lower the y-intercept, higher the value of R, Hence, R1<R2

5. What is the change in voltage across the resistor when the load line is shifted from R1 to R2?

analog-circuits-questions-answers-load-line-analysis-q4

a) 0 V

b) 9.25 V

c) 10 V

d) 9 V

Answer: a

Explanation: The value of voltage calculated across the resistor is calculated by E-VD, which is constant for both cases.

6. From the given load characteristics, what is the value of diode current at operating point for the characteristics of R2?

analog-circuits-questions-answers-load-line-analysis-q4

a) 9.3 mA

b) 4.6 mA

c) 0 mA

d) 10 mA

Answer: b

Explanation: At the point of intersection, the value of current is around 4.6 mA.

7. From the given load characteristics, what is the value of diode voltage at operating point for the characteristics of R2?

analog-circuits-questions-answers-load-line-analysis-q4

a) 0 V

b) 10 V

c) 0.7 V

d) 1 V

Answer: c

Explanation: At the point of intersection, the value of diode voltage is approximately 0.7 V.

8. Using the approximate equivalent model of a silicon diode and taking E=10 V and R=1k, what is the value of diode voltage at operating point?

a) 0.7 V

b) 0.3 V

c) 10 V

d) 9.3 V

Answer: a

Explanation: In the approximate equivalent model, the diode voltage is fixed at the forward bias threshold voltage, which for a silicon diode is equal to 0.7 V

9. Using the approximate equivalent model of a silicon diode and taking E=10 V and R=1k, what is the value of diode current at operating point?

a) 9.25 mA

b) 10 mA

c) 0 mA

d) 9.5 mA

Answer: a

Explanation: In the approximate equivalent model, the characteristic is assumed to be a vertical upward line at V=0.7 V. Hence, the current at point of intersection is determined to be 9.25 mA

10. Using the ideal diode model of a silicon diode and taking E=10 V and R=1k, what is the value of diode voltage at operating point?

a) 0.7 V

b) 0 V

c) 10 V

d) 0.3V

Answer: b

Explanation: In ideal diode model, we take the forward threshold voltage to be zero. Hence the diode characteristic is represented as the upper half of the y-axis. Hence, V D = 0 V.

11. Using the ideal diode model of a silicon diode and taking E=10 V and R=1k, what is the value of diode current at operating point?

a) 9.25 mA

b) 10 mA

c) 0 mA

d) 9.5mA

Answer: b

Explanation: In ideal diode model, we take the forward threshold voltage to be zero. Hence thee diode characteristic is represented as the upper half of the y-axis. Hence, I D = E/R = 10 mA.

12. The ideal diode model of a silicon semiconductor diode gives an error that is greater than that obtained in approximate equivalent model. Is the statement true or false?

a) True

b) False

Answer: a

Explanation: In the ideal diode we assume the diode voltage as zero whereas in the approximate equivalent circuit model, we assume VD = 0.7 V and the actual value is somewhere about 0.75-0.8 V. Hence, approximate equivalent model is more accurate.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Halfwave Rectifier”.

1. DC average current of a half wave rectifier output is ___________

(Where I m is the maximum peak current of input)

a) 2I m /ᴨ

b) I m /ᴨ

c) I m /2ᴨ

d) 1.414I m /ᴨ

Answer: b

Explanation: Average DC current of half wave rectifier is I m /ᴨ . Since output of half wave rectifier contains only one half of the input. The average value is the half of the area of one half cycle of sine wave with peak I m . This is equal to I m /ᴨ.

Thus this is calculated by Area of graph of current/Perion.

I DC =1/2π∫idx between 0 to 2π.

This is equal to I m /ᴨ.

2. DC power output of half wave rectifier is equal to ____________

(I m is the peak current and R L is the load resistance)

a) (2I m 2 / ᴨ 2 )R L

b) (I m 2 /2 ᴨ 2 )R L

c) (I m 2 / ᴨ 2 )R L

d) (4I m 2 / ᴨ 2 )R L

Answer: c

Explanation: Average DC power of half wave rectifier output is (I m 2 / ᴨ 2 )R L . Since power is VDC * IDC,

= I m /ᴨ x V m /ᴨ = V m I m / ᴨ 2

We know V m = I m R L . Therefore, power = (I m 2 / ᴨ 2 )R L .

3. Ripple factor of half wave rectifier is _________

a) 1.414

b) 1.21

c) 1.3

d) 0.48

Answer: b

Explanation: Ripple factor of a rectifier is the measure of the effectiveness of a power supply filter

in reducing the ripple voltage. It is calculated by taking ratio of RMS AC component of output voltage to DC component of output voltage.

r = √I rms 2 – I DC 2 /IDC

For a half wave rectifier, it is 1.21.

4. If input frequency is 50Hz then ripple frequency of half wave rectifier will be equal to __________

a) 100Hz

b) 50Hz

c) 25Hz

d) 500Hz

Answer: b

Explanation: The ripple frequency of output and input is the same since one half cycle of input is passed and other half cycle is blocked. So effectively frequency is the same.

5. Transformer utilization factor of a half wave rectifier is equal to __________

a) 0.267

b) 0.287

c) 0.297

d) 0.256

Answer: b

Explanation: Transformer utilization factor is the ratio of DC output power to the AC rating of the secondary winding. AC rating is the product of RMS voltage across winding and RMS current through the winding, expressed in volt-amp. This factor indicates the effectiveness of transformer usage by a rectifier. For half wave rectifier it is low and equal to 0.287.

6. If peak voltage on a half wave rectifier circuit is 5V and diode cut-in voltage is 0.7, then peak inverse voltage on diode will be __________

a) 3.6V

b) 4.3V

c) 5V

d) 5.7V

Answer: c

Explanation: PIV is the maximum reverse bias voltage that can be appeared across a diode in the circuit. If PIV rating of the diode is less than this value breakdown of diode may occur. For a half wave rectifier, PIV of diode is V m . Therefore, PIV is 5V.

7. Efficiency of half wave rectifier is __________

a) 50%

b) 81.2%

c) 40.6%

d) 45.3%

Answer: c

Explanation: Efficiency of a rectifier is a measure of the ability of a rectifier to convert input power into DC power. Mathematically it is equal to the ratio of DC output power to the total input power and efficiency = 40.6xR L /R F +R L %. Its maximum value is 40.6 %.

8. In a half wave rectifier, the input sine wave is 200sin100 ᴨt Volts. The average output voltage is __________

a) 57.456V

b) 60.548V

c) 75.235V

d) 63.661V

Answer: d

Explanation: The equation of sine wave is in the form E m sin wt.

Therefore, E m =200

Hence output voltage is E m /ᴨ. That is 200/ᴨ = 63.6619V.

9. In a half wave rectifier, the input sine wave is 200sin200 ᴨt Volts. If load resistance is of 1k then the average DC power output of half wave rectifier is __________

a) 3.25W

b) 4.05W

c) 5.02W

d) 6.25W

Answer: b

Explanation: The equation of sine wave is in the form E m sin wt.

On comparing E m = 200

Power = E m 2 / ᴨ 2 R L = 200/ ᴨ 2 x 1000.

10. In a half wave rectifier, the input sine wave is 250sin100 ᴨt Volts. The output ripple frequency of rectifier will be __________

a) 100Hz

b) 200Hz

c) 50Hz

d) 25Hz

Answer: c

Explanation: The equation of sine wave is in the form E m sin wt.

On comparing equation w = 100 ᴨ rad/s

We know w=2 ᴨ x frequency.

Therefore, frequency = 50 Hz.

Ripple frequency and input frequency are the same.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Fullwave Rectifier”.

1. DC average current of a center taped full wave rectifier is _______________

(Where I m is the maximum peak current of input)

a) 2I m /ᴨ

b) I m /ᴨ

c) I m /2ᴨ

d) 1.414I m /ᴨ

Answer: a

Explanation: Average DC current is the average current in the output of the rectifier. For a center tapped full wave rectifier, if a sinusoidal input is given, then output will contain only one half cycle repeatedly. So average current will be twice as half wave rectifier.

2. DC power output of center tapped full wave rectifier is equal to ___________

(I m is the peak current and R L is the load resistance)

a) (2I m 2 /ᴨ 2 )R L

b) (I m 2 /2 ᴨ 2 )R L

c) (I m 2 /ᴨ 2 )R L

d) (4I m 2 /ᴨ 2 )R L

Answer: d

Explanation: DC output power is the power output of the rectifier. It is equal to V DC I DC .

We know V DC for a center taped rectifier is 2V m /ᴨ and I DC for a center tap rectifier is 2I m /ᴨ.

We also know V DC = I DC /R L .

Hence output power is (4I m 2 / ᴨ 2 )R L .

3. Ripple factor of center tapped full wave rectifier is _____________

a) 1.414

b) 1.21

c) 1.3

d) 0.48

Answer: d

Explanation: Ripple factor of a rectifier is the measure of the effectiveness of a power supply filter in reducing the ripple voltage. It is calculated by taking a ratio of RMS AC voltage to DC output voltage. For a center tapped full wave rectifier, it is 0.482.

4. If input frequency is 50Hz then ripple frequency of center tapped full wave rectifier will be equal to _____________

a) 100Hz

b) 50Hz

c) 25Hz

d) 500Hz

Answer: a

Explanation: Since in the output of center tapped rectifier one half cycle is repeated hence frequency will twice as that of input frequency. That is 100Hz.

5. Transformer utilization factor of a center tapped full wave rectifier is equal to ___________

a) 0.623

b) 0.678

c) 0.693

d) 0.625

Answer: c

Explanation: Transformer utilization factor is the ratio of DC power supplied to the AC rating of the primary winding. The factor indicated the effectiveness of transformer usage by the rectifier. For a center tapped full wave rectifier, it is equal to 0.81 w.r.t the primary winding, 0.57 w.r.t the secondary winding and the average value is 0.69.

6. If peak voltage on a center tapped full wave rectifier circuit is 5V and diode cut-in voltage is 0.7, then peak inverse voltage on diode will be ___________

a) 4.3 V

b) 10 V

c) 5.7 V

d) 9.3 V

Answer: b

Explanation: PIV is the maximum reveres bias voltage that can be appeared across a diode in the circuit. If PIV rating of the diode is less than this value breakdown of diode may occur. For a center tapped full wave rectifier, PIV of diode is 2V m . Therefore, PIV is 10 V.

7. Efficiency of center tapped full wave rectifier is ___________

a) 50%

b) 81.2%

c) 40.6%

d) 45.3%

Answer: b

Explanation: Efficiency of a rectifier is the effectiveness of rectifier to convert AC to DC. It is obtained by taking a ratio of DC power output to maximum input power delivered to load. It is usually expressed in percentage. For center tapped full wave rectifier, it is 81.2%.

8. In a center tapped full wave rectifier, the input sine wave is 20sin500 ᴨt. The average output voltage is __________

a) 12.73V

b) 6.93V

c) 11.62V

d) 3.23V

Answer: a

Explanation: The equation of sine wave is in the form E m sin wt.

Therefore, E m =20

Hence output voltage is 2E m / ᴨ. That is 40/ ᴨ.

9. In a center tapped full wave rectifier, the input sine wave is 200sin50 ᴨt. If load resistance is of 1k then average DC power output of half wave rectifier is __________

a) 12.56W

b) 16.20W

c) 4.02W

d) 8.04W

Answer: b

Explanation: The equation of sine wave is in the form E m sin wt.

On comparing E m = 200

Power = 4E m 2/ ᴨ 2 R L = 800/ ᴨ 2 x 1000 = 16.20W.

10. In a center tapped full wave rectifier, the input sine wave is 250sin100 ᴨt. The output ripple frequency of rectifier will be __________

a) 50Hz

b) 200Hz

c) 100Hz

d) 25Hz

Answer: c

Explanation: The equation of sine wave is in the form E m sin wt.

Therefore, w = 100ᴨ that is, frequency f = w/2ᴨ = 50Hz

Since the output of center tapped full wave rectifier have double the frequency of input, output frequency is 100Hz.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Bridge Rectifier”.

1. DC average current of a bridge full wave rectifier is _________

(Where I m is the maximum peak current of input)

a) 2I m /ᴨ

b) I m /ᴨ

c) I m /2ᴨ

d) 1.414I m /ᴨ

Answer: a

Explanation: Average DC current is the average current in the output of rectifier. For a bridge full wave rectifier, if a sinusoidal input is given output will contain only one half cycle repeatedly. So average current will be twice as half wave rectifier.

2. DC power output of bridge full wave rectifier is equal to _________

(I m is the peak current and R L is the load resistance)

a) (2I m 2 / ᴨ 2 )R L

b) (4I m 2 / ᴨ 2 )R L

c) (I m 2 / ᴨ 2 )R L

d) (I m 2 /2 ᴨ 2 )R L

Answer: b

Explanation: DC output power is the power output of the rectifier. It is equal to V DC xI DC .

We know V DC for a bridge rectifier is 2V m /ᴨ and I DC for a bridge rectifier is 2I m /ᴨ. We also know V DC = I DC /R L .

Hence output power is I DC 2 R L = (4I m 2 /ᴨ 2 )R L .

3. Ripple factor of bridge full wave rectifier is _________

a) 1.414

b) 1.212

c) 0.482

d) 1.321

Answer: c

Explanation: Ripple factor of a rectifier measures the ripples or AC content in the output. It is obtained by dividing AC rms output with DC output. For full wave bridge rectifier it is 0.482.

4. If input frequency is 50Hz then ripple frequency of bridge full wave rectifier will be equal to _________

a) 200Hz

b) 50Hz

c) 45Hz

d) 100Hz

Answer: d

Explanation: Since in the output of bridge rectifier one half cycle is repeated hence frequency will twice as that of input frequency. That is 100Hz.

5. Transformer utilization factor of a bridge full wave rectifier is equal to _________

a) 0.62

b) 0.69

c) 0.81

d) 0.43

Answer: c

Explanation: Transformer utilization factor is the ratio of AC power delivered to load to the DC power rating. This factor indicates effectiveness of transformer usage by rectifier. For bridge full wave rectifier it is equal to 0.81.

6. If peak voltage on a bridge full wave rectifier circuit is 5V and diode cut-in voltage is 0.7, then peak inverse voltage on diode will be _________

a) 4.3V

b) 5.7V

c) 10V

d) 5V

Answer: d

Explanation: PIV is the maximum reveres bias voltage that can be appeared across a diode in the circuit. If PIV rating of the diode is less than this Value breakdown of diode may occur. Therefore, PIV rating of diode should be greater than PIV in the circuit. For bridge rectifier PIV is 5V.

7. Efficiency of bridge full wave rectifier is _________

a) 81.2%

b) 50%

c) 40.6%

d) 45.3%

Answer: a

Explanation: It is obtained by taking ratio of DC power output to maximum AC power delivered to load. Efficiency of a rectifier is the effectiveness of rectifier to convert input power to DC. It is usually expressed in percentage. For bridge full wave rectifier, it is 81.2%.

8. In an bridge full wave rectifier, the input sine wave is 40sin100 ᴨt. The average output voltage is ________

a) 22.73V

b) 16.93V

c) 25.47V

d) 33.23V

Answer: c

Explanation: The equation of sine wave is in the form E m sin wt.

Therefore, E m =40

Hence output voltage is 2E m /ᴨ. That is 80/ᴨ.

9. Number of diodes used in a full wave bridge rectifier is ________

a) 1

b) 2

c) 4

d) 6

Answer: c

Explanation: The model of bridge rectifier is same as a Wien bridge circuit. Like a Wien bridge circuit needs 4 resistors, bridge rectifier needs 4 diodes while center tap configuration requires only one.

10. In a bridge full wave rectifier, the input sine wave is 250sin100 ᴨt. The output ripple frequency of rectifier will be ________

a) 50Hz

b) 200Hz

c) 100Hz

d) 25Hz

Answer: c

Explanation: In a bridge full wave rectifier, the input sine wave is 250sin100 ᴨt Volts. The output ripple frequency of the rectifier will be 100Hz.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Series Clipper-1”.

1. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-series-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: c

Explanation: In the circuit of serial clipper, it clips the negative half cycle and the output will only contain positive half cycle. In this problem input is a sine wave, hence output will be positive half of sine wave.

2. For a circuit given below, what will be the output if input signal is a triangular wave shown below.

analog-circuits-questions-answers-series-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q1c

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q2d

Answer: d

Explanation: In the circuit of serial clipper, it clips the negative half cycle and the output will only contain positive half cycle. In this problem input is a triangular wave, hence output will be positive half of triangular wave.

3. For a circuit given below, what will be the output if input signal is a square wave shown below.

analog-circuits-questions-answers-series-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q3

a) analog-circuits-questions-answers-series-clipper-1-q1c

b) analog-circuits-questions-answers-series-clipper-1-q2d

c) analog-circuits-questions-answers-series-clipper-1-q3c

d) analog-circuits-questions-answers-series-clipper-1-q3d

Answer: d

Explanation: In the circuit of serial clipper, it clips the negative half cycle and the output will only contain positive half cycle. In this problem input is a square wave, hence output will be positive half of square wave.

4. A simple circuit diagram for a serial clipper is given below. What will be the transfer characteristics of the circuit?

analog-circuits-questions-answers-series-clipper-1-q1

a) analog-circuits-questions-answers-series-clipper-1-q4a

b) analog-circuits-questions-answers-series-clipper-1-q4b

c) analog-circuits-questions-answers-series-clipper-1-q4c

d) analog-circuits-questions-answers-series-clipper-1-q4d

Answer: a

Explanation: Since at constant voltage drop model voltage drop across diode at forward bias is a constant. In this circuit if input is negative diode is reverse bias hence no current. So for negative input output is zero. For positive input V out will be equal to input with a voltage drop of V D .

5. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-series-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: d

Explanation: In the circuit of serial clipper, it clips the positive half cycle and the output will only contain negative half cycle. In this problem input is a sine wave, hence output will be negative half of sine wave.

6. For a circuit given below, what will be the output if input signal is a triangular wave shown below.

analog-circuits-questions-answers-series-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q1c

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q2d

Answer: a

Explanation: In the circuit of serial clipper, it clips the positive half cycle and the output will only contain negative half cycle. In this problem input is a triangular wave, hence output will be negative half of triangular wave.

7. For a circuit given below, what will be the output if input signal is a triangular wave shown below.

analog-circuits-questions-answers-series-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q3

a) analog-circuits-questions-answers-series-clipper-1-q1c

b) analog-circuits-questions-answers-series-clipper-1-q2d

c) analog-circuits-questions-answers-series-clipper-1-q3c

d) analog-circuits-questions-answers-series-clipper-1-q3d

Answer: c

Explanation: In the circuit of serial clipper, it clips the positive half cycle and the output will only contain negative half cycle. In this problem input is a square wave, hence output will be negative half of square wave.

8. A simple circuit diagram for a serial clipper is given below. What will be the transfer characteristics of the circuit?

analog-circuits-questions-answers-series-clipper-1-q5

a) analog-circuits-questions-answers-series-clipper-1-q4a

b) analog-circuits-questions-answers-series-clipper-1-q4b

c) analog-circuits-questions-answers-series-clipper-1-q4c

d) analog-circuits-questions-answers-series-clipper-1-q4d

Answer: b

Explanation: Since at constant voltage drop model voltage drop across diode at forward bias is a constant. In this circuit if input is positive diode is reverse bias hence no current. So for positive input output is zero. For negative input V out will be equal to input with a voltage drop of V D .

This set of Analog Circuits Interview Questions and Answers for Experienced people focuses on “Series Clipper-2”.

1. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V is 1V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q1

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: a

Explanation: Total voltage in the circuit is Vin-VD-V

= 5sint – 0.7 – 1 = 5sint – 1.7

The voltage across resistor R2 = Vtotalx R2/

= 1/2

Maximum value of output will be 5-1.7/2 = 1.65V

The output will be positive half of sine wave with an upward shift of 1V.

In the diagram below Red is input and green is output

analog-circuits-interview-questions-answers-experienced-q1e .

2. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V is -1V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q1

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: b

Explanation: Total voltage in the circuit is Vin-VD-V

= 5sint – 0.7 + 1 = 5sint + 0.3

The voltage across resistor R2 = Vtotal x R2/

= 1/2

Maximum value of output will be 5+0.3/2 = 2.65V

The output will be positive half of sine wave with a downward shift of 1V.

In the diagram below Red is input and green is output

analog-circuits-interview-questions-answers-experienced-q2 .

3. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V is 1V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q3a

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: c

Explanation: Total voltage in the circuit is Vin-VD+V

= 5sint – 0.7 + 1 = 5sint + 0.3

The voltage across resistor R2 = Vtotalx R2/

= 1/2

Maximum value of output will be 5+0.3/2 = 2.65V

The output will be positive half of sine wave with maximum voltage of 2.65V

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q3

4. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V is 1V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q4

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: d

Explanation: Total voltage in the circuit is Vin-VD-V

= 6sint – 0.7 – 1 = 6sint – 1.7

The voltage across resistor R2 = Vtotal x R2/

= 1/2

Maximum value of output will be 6-1.7/2 = 2.15V

The output will be positive half of sine wave with reduction of 1.7V and maximum of 2.15V.

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q4a

5. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V1 is 1V and V2 is 1.5V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q5

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: a

Explanation: Total voltage in the circuit is Vin-VD-V1-V2

= 5sint – 0.7 – 1 – 1.5 = 5sint -3.2

The voltage across resistor R2 = Vtotalx R2/

= 1/2

Maximum value of output will be 5-3.2/2 = 0.9V.

The output will be positive half of sine wave with reduction of 3.2V and maximum of 0.9V.

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q5a

6. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V1 is -1.5V and V2 is 1V. Cut-in voltage of diode is 0.7V. What will be the output of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q5

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: b

Explanation: Total voltage in the circuit is Vin-VD-V1-V2

= 5sint – 0.7 + 1.5 – 1 = 5sint – 0.2

The voltage across resistor R2 = Vtotalx R2/

= 1/2

Maximum value of output will be 5-0.2/2 = 2.4V.

The output will be positive half of sine wave with a maximum of 2.4V.

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q7

7. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V1 is 1.5V and V2 is -1V. Cut-in voltage of diode is 0.7V. What will be the output, Vout of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q5

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: c

Explanation: Total voltage in the circuit is Vin-VD-V1-V2

= 5sint – 0.7 – 1.5 + 1 = 5sint – 1.2

The voltage across resistor R2 = Vtotal x R2/

= 1/2

Maximum value of output will be 5-1.2/2 = 1.9V.

The output will be positive half of sine wave with a maximum of 1.9V.

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q7a

8. In the following clipper circuit resistance R1 and R2 is 1k. Voltage V1 is 1.5V and V2 is 1 V. Cut-in voltage of diode is 0.7V. What will be the output, Vout of the system if Vin is the signal given below?

analog-circuits-interview-questions-answers-experienced-q8

a) analog-circuits-interview-questions-answers-experienced-q1a

b) analog-circuits-interview-questions-answers-experienced-q1b

c) analog-circuits-interview-questions-answers-experienced-q1c

d) analog-circuits-interview-questions-answers-experienced-q1d

Answer: d

Explanation: Total voltage in the circuit is Vin-VD-V1-V2

= 5sint – 0.7 – 1.5 – 1 = 5sint – 3.2

The voltage across resistor R2 = Vtotal x R2/

= 1/2

Maximum value of output will be 5-3.2/2 = 0.9V.

The output will be positive half of sine wave with a maximum of 0.9V and with an upward shift of 1V.

In the diagram below Red is input and green is output.

analog-circuits-interview-questions-answers-experienced-q8a

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Parallel Clipper-1”.

1. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: d

Explanation: In this circuit of parallel clipper, diode conducts the half cycle when it is positive and the output will only contain negative half cycle. In this problem input is a sine wave, hence output will be negative half of sine wave.

2. For a circuit given below, what will be the output if input signal is a triangular wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q1c

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: a

Explanation: In this circuit of parallel clipper, diode conducts the half cycle when it is positive and the output will only contain negative half cycle. In this problem input is a triangular wave, hence output will be negative half of that wave.

3. For a circuit given below, what will be the output if input signal is a square wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q3

a) analog-circuits-questions-answers-series-clipper-1-q1c

b) analog-circuits-questions-answers-series-clipper-1-q2d

c) analog-circuits-questions-answers-series-clipper-1-q3c

d) analog-circuits-questions-answers-series-clipper-1-q3d

Answer: c

Explanation: In this circuit of parallel clipper, diode conducts the half cycle when it is positive and the output will only contain negative half cycle. In this problem input is a square wave, hence output will be negative half of that wave.

4. A simple circuit diagram for a parallel clipper is given below. What will be the approximate transfer characteristics of the circuit?

analog-circuits-questions-answers-parallel-clipper-1-q1

a) analog-circuits-questions-answers-series-clipper-1-q4a

b) analog-circuits-questions-answers-series-clipper-1-q4b

c) analog-circuits-questions-answers-series-clipper-1-q4c

d) analog-circuits-questions-answers-series-clipper-1-q4d

Answer: d

Explanation: The above is a parallel clipper with an ideal diode model, so whenever the input is in its negative cycle, it will come as the output as the diode will then not conduct. When positive, diode conducts and output is zero.

5. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: c

Explanation: In this circuit of parallel clipper, diode conducts whenever the input cycle is the negative half cycle and thus output will only contain positive half cycle. In this problem, input is a sine wave, hence output will be positive half of sine wave.

6. For a circuit given below, what will be the output if input signal is a triangular wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q1c

a) analog-circuits-questions-answers-series-clipper-1-q1b

b) analog-circuits-questions-answers-series-clipper-1-q1c

c) analog-circuits-questions-answers-series-clipper-1-q1d

d) analog-circuits-questions-answers-series-clipper-1-q1e

Answer: b

Explanation: In this circuit of parallel clipper, diode conducts whenever the input cycle is the negative half cycle and thus output will only contain positive half cycle. In this problem, input is a triangular wave, hence output will be positive half of that wave.

7. For a circuit given below, what will be the output if input signal is a square wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q3

a) analog-circuits-questions-answers-series-clipper-1-q1c

b) analog-circuits-questions-answers-series-clipper-1-q2d

c) analog-circuits-questions-answers-series-clipper-1-q3c

d) analog-circuits-questions-answers-series-clipper-1-q3d

Answer: d

Explanation: In this circuit of parallel clipper, diode conducts whenever the input cycle is the negative half cycle and thus output will only contain positive half cycle. In this problem, input is a square wave, hence output will be positive half of that wave.

8. A simple circuit diagram for a serial clipper is given below. What will be the transfer characteristics of the circuit?

analog-circuits-questions-answers-parallel-clipper-1-q5

a) analog-circuits-questions-answers-series-clipper-1-q4a

b) analog-circuits-questions-answers-series-clipper-1-q4b

c) analog-circuits-questions-answers-series-clipper-1-q4c

d) analog-circuits-questions-answers-series-clipper-1-q4d

Answer: d

Explanation: For ideal diode, the above is a negative clipper. When the input cycle is negative, the diode conducts and no output is obtained. However, when input is positive, the diode is reverse biased and complete input is observed as output.

9. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q5

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-parallel-clipper-1-q9

b) analog-circuits-questions-answers-parallel-clipper-1-q9a

c) analog-circuits-questions-answers-parallel-clipper-1-q9b

d) analog-circuits-questions-answers-parallel-clipper-1-q9c

Answer: d

Explanation: The above is a parallel clipper, which conducts when the input is negative and blocks signals when input is positive. Hence, when input is positive, it doesn’t conduct and complete input appears in output. When input is negative, the diode conducts, forward biased, and only the voltage drop of diode appears since it’s a constant voltage drop model.

10. For a circuit given below, what will be the output if input signal is a sine wave shown below.

analog-circuits-questions-answers-parallel-clipper-1-q1

analog-circuits-questions-answers-series-clipper-1-q1a

a) analog-circuits-questions-answers-parallel-clipper-1-q9

b) analog-circuits-questions-answers-parallel-clipper-1-q9a

c) analog-circuits-questions-answers-parallel-clipper-1-q9b

d) analog-circuits-questions-answers-parallel-clipper-1-q9c

Answer: b

Explanation: The above is a parallel clipper, which conducts when the input is positive and blocks signals when input is negative. Hence, when input is negative, it doesn’t conduct and complete input appears in output. When input is positive, the diode conducts, forward biased, and only the voltage drop of diode appears since it’s a constant voltage drop model.

This set of Analog Circuits test focuses on “Parallel Clipper-2”.

1. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q1

a) analog-circuits-questions-answers-test-q1a

b) analog-circuits-questions-answers-test-q1b

c) analog-circuits-questions-answers-test-q1c

d) analog-circuits-questions-answers-test-q1d

Answer: a

Explanation: When diode D is forward biased it conducts current and hence voltage drop across is V D .

For positive half cycle of the input diode conducts and V out becomes V D . The linear portion of the graph is the point where V in is positive is because up to 0.7V diode will not conduct and input as such appears on output. When diode is reverse bias there is no current through the diode and hence the voltage will be same as that across the resistor which is connected to ground. It is V in x1k/.

The minimum voltage across it will be -5/2 = -2.5V and maximum voltage at output is 0.7V

In the diagram, red shows input and green shows output

analog-circuits-questions-answers-test-q1e .

2. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q2

a) analog-circuits-questions-answers-test-q2a

b) analog-circuits-questions-answers-test-q2b

c) analog-circuits-questions-answers-test-q2c

d) analog-circuits-questions-answers-test-q2d

Answer: c

Explanation: When diode D is forward biased it conducts current and hence voltage drop across is V D .

For positive half cycle of the input diode conducts and V out becomes V D . When diode is reverse bias there is no current through the diode and hence the voltage will be same as that across the resistor which is connected to ground. It is V in x1k/.

The minimum voltage across it will be -5/2 = -2.5V and maximum voltage at output is 0.7V.

3. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q3

a) analog-circuits-questions-answers-test-q1a

b) analog-circuits-questions-answers-test-q1b

c) analog-circuits-questions-answers-test-q1c

d) analog-circuits-questions-answers-test-q1d

Answer: d

Explanation: When diode D is forward biased it conducts current and hence voltage drop across is V D .

For negative half cycle of the input diode conducts and V out becomes V D . When diode is reverse bias there is no current through the diode and hence the voltage will be same as that across the resistor which is connected to ground. It is V in x1k/.

The maximum voltage across it will be 5/2 = 2.5V and minimum voltage at output is -0.7V

In the diagram, red shows input and green shows output.

analog-circuits-questions-answers-test-q3a

4. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q4

a) analog-circuits-questions-answers-test-q2a

b) analog-circuits-questions-answers-test-q2b

c) analog-circuits-questions-answers-test-q2c

d) analog-circuits-questions-answers-test-q2d

Answer: d

Explanation: When diode D is forward biased it conducts current and hence voltage drop across is V D .

The maximum voltage across it will be 5/2 = 2.5V and minimum voltage at output is -0.7V.

5. Find the output voltage for the circuit below.

analog-circuits-questions-answers-test-q5

a) 5v

b) 2v

c) 0V

d) 10v

Answer: c

Explanation: In circuit of parallel clipper voltage across the diode D2 will be same as a simple parallel clipper. The output of the circuit is null because the output of diode D2 is negative and diode D will not conduct negative voltage.

6. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q6

a) analog-circuits-questions-answers-test-q6a

b) analog-circuits-questions-answers-test-q6b

c) analog-circuits-questions-answers-test-q6c

d) analog-circuits-questions-answers-test-q6d

Answer: a

Explanation: The correct answer is the graph between 0 to -4.3V. The parallel diode conducts when voltage at node is greater than 0.7V and then the output is 0V. When the voltage goes less than 0.7V, parallel diode is reverse biased and doesn’t conduct. Voltage is across the output diode but there is a drop of 0.7V across it. So output is V IN – 0.7.

7. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q7

a) analog-circuits-questions-answers-test-q6a

b) analog-circuits-questions-answers-test-q6b

c) analog-circuits-questions-answers-test-q6c

d) analog-circuits-questions-answers-test-q6d

Answer: b

Explanation: Here in the circuit since both diodes are in opposite direction both positive and negative cycles will pass through diodes. Since both diodes conduct every time the voltage across diodes will always be 0.7V and sign depends on the cycle.

8. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q8

a) analog-circuits-questions-answers-test-q8a

b) analog-circuits-questions-answers-test-q8b

c) analog-circuits-questions-answers-test-q8c

d) analog-circuits-questions-answers-test-q8d

Answer: d

9. For the circuit given below, which of the following diagram represent V out if V in is the signal shown below?

analog-circuits-questions-answers-test-q9

a) analog-circuits-questions-answers-test-q9a

b) analog-circuits-questions-answers-test-q9b

c) analog-circuits-questions-answers-test-q9c

d) analog-circuits-questions-answers-test-q9d

Answer: c

Explanation: The circuit can be simplified using star –delta conversion of resistors. The three resistor network can be solved by delta – star equivalent which gives a simplified form as former questions afer solV in g star –delta the circuit will look like as follows

analog-circuits-questions-answers-test-q9e

Hence the circuit is simplified.

When diode D is forward biased it conducts current and hence voltage drop across is V D .

The maximum voltage across it will be 0.7V and minimum voltage at output is -1V

In the diagram, red shows input and green shows output.

analog-circuits-questions-answers-test-q9f

his set of Analog Circuits Multiple Choice Questions & Answers focuses on “Parallel Clipper Circuit with Reference Voltage-1”.

1. Which of the following graphs will be appropriate to describe output V of the circuit given below?

(The voltage VB is 1V and input to the circuit V in is 5sint. The resistance R is 1K. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1d

Answer: d

Explanation: In the circuit VB is in the forward direction for diode. At positive cycle of V in diode will be forward biased up to V in = 0.3V. Up to 0.3V output is 0.3V and after this diode is reverse biased and output follows input. In negative cycle diode is always forward biased and output will be equal to 1-0.7 = 0.3V.

2. Which of the following graphs will be appropriate to describe output V of the circuit given below?

(The voltage VB is 1V and input to the circuit V in is 5sint. The resistance R is 1K. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q2

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1d

Answer: c

Explanation: In the circuit, diode is forward biased, whenever the voltage at the N side is negative, i.e, 5sint – 1 < 0. Whenever diode is forward biased, output voltage is 0.7V due to the constant voltage drop model. When the diode is reverse biased, the complete input 5sint – 1 is observed at the output side. So the output lies between 0.7V to 5sint-1V, i.e a maximum of 4V.

In the following diagram red represents input and green represents output.

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q2a

3. Which of the following graphs will be appropriate to describe output V of the circuit given below?

(The voltage VB is 1V and input to the circuit V in is 5sint. The resistance R is 1K. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q3

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1d

Answer: b

Explanation: In the circuit VB is in the reverse direction for diode. During positive cycle of input, when 5sint -1 > 0.7, then output voltage is 0.7V since the diode is forward biased. When 5sint-1<0, then output follows input since the diode is reverse biased. Thus minimum possible output is -5-1 = -6.

4. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Assume both diodes are identical. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q4

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1d

Answer: d

Explanation: In the circuit V 1 and V 2 are in the forward direction for diodes. Since these are parallel we can consider this as a single diode and source. At positive cycle of V in diode will be forward biased up to V in = 0.3V. Up to 0.3V output is 0.3V and after this diode is reverse biased and output follows input. In negative cycle diode is always forward biased and output will be equal to 1-0.7 = 0.3V.

5. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Assume both diodes are identical. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q5

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q1d

Answer: b

Explanation: In this circuit diodes are placed opposite to each other. So output will be determined by diode which is in forward bias. At negative cycle first diode will be forward biased hence output will be 0.3V. At positive cycle diode will be reverse bias up to 1.7V so input follows output and after this it is constant and equals to 1.7V.

6. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Assume both diodes are identical. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6d

Answer: c

Explanation: Since both diodes are in reverse mode with respect to V 1 and V 2 , at negative V output follows input. At positive cycle up to 1.7V diodes are in reverse bias mode and after this they becomes forward biased and output becomes a constant and equals to 1.7V.

7. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1.5V and input to the circuit V is 5sint. Assume both diodes are identical. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q7

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6d

Answer: b

Explanation: To forward bias the first diode, input needs to be greater than 1.7V. Hence whenever input is greater than 1.7V, output is constant at 1.7V. When input is less than 0.8V, the second diode is forward biased. Between these values, output follows the input.

8. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q8

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q8a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6d

Answer: a

Explanation: At positive cycle of V, V 1 opposes hence output will be 5sint-1. For negative half cycle of V, output will be 0.3V because diode is already in forward bias.

9. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q9

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q9a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q9d

Answer: a

Explanation: For negative half cycle diode is forward biased and hence output is 0.3V. For positive half cycle output will be /2. Hence maximum voltage will be 6/2 = 3V.

10. Which of the following graphs will be appropriate to describe output V out of the circuit given below?

(The voltage V 1 is 1V, V 2 is 1V and input to the circuit V is 5sint. Use constant voltage drop model for diode and take cut-in voltage as 0.7V)

analog-circuits-questions-answers-piecewise-linear-model-diode-2-q10

a) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6a

b) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6b

c) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q6c

d) analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q9d

Answer: d

Explanation: For negative half cycle of V and up to 3.4V in positive half cycle since diode is in reverse bias output will be /2 Since voltage divided in between two 1K, third one has no effect). Hence minimum voltage will be -4/2 = -2V. After 3.4V output becomes 1.7V.

analog-circuits-questions-answers-parallel-clipper-reference-voltage-1-q10a

This set of Analog Circuits Quiz focuses on “Parallel Clipper Circuit with Reference Voltage-2”.

1. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q1

a) analog-circuits-questions-answers-quiz-q1a

b) analog-circuits-questions-answers-quiz-q1b

c) analog-circuits-questions-answers-quiz-q1c

d) analog-circuits-questions-answers-quiz-q1d

Answer: b

Explanation: V 2 is forward bias to diode. At positive cycle of V diode is reverse biased and output will be the half of input . At negative cycle output will be 0.3 because diode is forward biased.

2. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q2

a) analog-circuits-questions-answers-quiz-q1a

b) analog-circuits-questions-answers-quiz-q1b

c) analog-circuits-questions-answers-quiz-q1c

d) analog-circuits-questions-answers-quiz-q1d

Answer: c

Explanation: V 2 is reverse bias to diode. When diode is forward biased output will be 1.7V all other time output will be 5sint/2.

3. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q3

a) analog-circuits-questions-answers-quiz-q1a

b) analog-circuits-questions-answers-quiz-q1b

c) analog-circuits-questions-answers-quiz-q1c

d) analog-circuits-questions-answers-quiz-q1d

Answer: c

Explanation: V 2 is reverse bias to diode. When diode is forward biased output will be 1.7V all other time output will be 5sint/2 .

4. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q4

a) analog-circuits-questions-answers-quiz-q1a

b) analog-circuits-questions-answers-quiz-q1b

c) analog-circuits-questions-answers-quiz-q1c

d) analog-circuits-questions-answers-quiz-q1d

Answer: d

Explanation: V 2 is forward bias to diode. At positive cycle of V diode is reverse biased and output will be the half of input . At negative cycle output will be 0.3 because diode is forward biased.

5. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q5

a) analog-circuits-questions-answers-quiz-q1a

b) analog-circuits-questions-answers-quiz-q1b

c) analog-circuits-questions-answers-quiz-q1c

d) analog-circuits-questions-answers-quiz-q1d

Answer: a

Explanation: We change the delta resistor network into a star, where each resistance is now 1/3 ohms. Hence the voltage at node is now 5sint x 1/5 = sint. Hence maximum output is only 1V. The node voltage needs to be less than 0.3V for diode to conduct. That moment, the output is zero. For voltage above 0.3V, the output is obtained.

6. What will be the output of the circuit V out if the voltage V 2 is 0.1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q6

a) analog-circuits-questions-answers-quiz-q6a

b) analog-circuits-questions-answers-quiz-q6b

c) analog-circuits-questions-answers-quiz-q1d

d) analog-circuits-questions-answers-quiz-q6d

Answer: a

Explanation: We must solve this problem using star- delta conversion. If not this will be difficult to solve.

After conversion circuit diagram will be as follows

analog-circuits-questions-answers-quiz-q6e

For positive half cycle of V, diode will be forward biased if V is greater than 2.51V (that is we need 1.7V at output and therefore input must be 0.8×1.66/0.33 = 4V.

For negative half cycle output follows input with compression of 0.198.

Therefore, minimum voltage will be -5×0.198 = -0.99V.

7. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q7

a) analog-circuits-questions-answers-quiz-q6a

b) analog-circuits-questions-answers-quiz-q6b

c) analog-circuits-questions-answers-quiz-q1d

d) analog-circuits-questions-answers-quiz-q6d

Answer: c

Explanation: Since V 2 is reverse bias to diode, the peak of output will be 1.7V. It is because after 1.7V diode becomes forward bias and voltage drop across diode becomes a constant. For V<1.7 output follows input because diode is in reverse bias mode.

8. What will be the output of the circuit V out if the voltage V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q7a

a) analog-circuits-questions-answers-quiz-q6a

b) analog-circuits-questions-answers-quiz-q6b

c) analog-circuits-questions-answers-quiz-q1d

d) analog-circuits-questions-answers-quiz-q6d

Answer: b

Explanation: Since V 2 is forward bias to diode, the peak of output will be 5V. It is because after 0.3V diode becomes reverse bias and output follows input. For V<0.3 voltage drop across diode becomes a constant because diode is in forward bias mode and output will be 0.3V .

9. What will be the output of the circuit V out if the voltage V1 is 1V, V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q9

a) analog-circuits-questions-answers-quiz-q6a

b) analog-circuits-questions-answers-quiz-q6b

c) analog-circuits-questions-answers-quiz-q1d

d) analog-circuits-questions-answers-quiz-q6d

Answer: d

10. What will be the output of the circuit V out if the voltage V1 is 1V, V 2 is 1V and input to the circuit V is 5sint?

analog-circuits-questions-answers-quiz-q10

a) analog-circuits-questions-answers-quiz-q6a

b) analog-circuits-questions-answers-quiz-q6b

c) analog-circuits-questions-answers-quiz-q1d

d) analog-circuits-questions-answers-quiz-q6d

Answer: c

Explanation: Since V 2 is forward bias to diode, the peak of output will be 3V . It is because after 1.3V diode becomes reverse bias and output follows input . For V<1.3V voltage drop across diode becomes a constant because diode is in forward bias mode and output will be 0.7V.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Clamper Circuit”.

1. Which of the following is not true regarding clamper?

a) A positive clamper adds a positive DC voltage

b) A clamper can also be called as a re-inserter

c) To reduce tilt, reduce the RC value

d) Negative clamper will clamp the positive peak of output to the reference voltage

Answer: c

Explanation: Clamper is called a re-inserter since it adds DC voltage to wave, inserts DC. Also, a positive clamper adds a positive DC voltage, shifting the wave up, and vice versa for the negative clamper. However, to reduce the tilt in the output, RC should be large, not small.

2. What is A, B, C and D to design a voltage doubler in the given circuit?

analog-circuits-questions-answers-clamper-circuit-q2

a) A=B=Resistors, C=D=Diodes

b) A=D=Capacitors, B=C=Diodes

c) A=Capacitor, B=D=Diodes, C=Resistor

d) A=C=Diodes, B=D=Capacitors

Answer: b

Explanation: During the negative cycle, D1 conducts and C1 charges up to peak input. When the input is positive, then D2 conducts and C2 charges up to 2Vm. This creates a voltage doubler.

analog-circuits-questions-answers-clamper-circuit-q2a

3. Consider the circuit provided. Total discharge time = 0.5 ms. Consider the diode to be an ideal diode, for a square wave input of ± 10 V, what is the percentage tilt? Misplaced &

analog-circuits-questions-answers-clamper-circuit-q3

a) 10%

b) 1%

c) 0.1%

d) 1.1%

Answer: b

Explanation: Total discharge time Td=0.5ms. For ideal diode, no cut-in voltage.

% Tilt = ΔV o /2Vm * 100

I discharge = 2Vm/R = 2*10/50k = 0.4 mA

ΔV o = T discharge *I discharge /C = 0.5ms*0.4mA/1MF = 0.2

% Tilt = * 100 = 1 %.

4. Given input for the circuit is f = 1 KHz.

analog-circuits-questions-answers-clamper-circuit-q4

Diode cut-in voltage = 0.7 V

analog-circuits-questions-answers-clamper-circuit-q4a

Output waveform:

analog-circuits-questions-answers-clamper-circuit-q4b

For the given output, find V1 and discharge time?

a) 4.3 V, 1ms

b) 4V, 0.5ms

c) 4.3V, 0.5ms

d) 5.7V, 1ms

Answer: c

Explanation: Original wave is from +10V to -10V. The final square wave is from +5V to -15V. Negative DC voltage is added, it’s a negative clamper.

Thus, V o = 5 V when V in = 10 V. V cut-in = 0.7 V

Then, V o = V in – (V1 + V cut-in ) = 10 – = 5

Therefore V1 = 4.3 V

Discharge time = T o /2 ; T o = 1/f o = 1/1000 = 1 ms; Discharge time = 0.5 ms.

5. In the given circuit, given that C=2MF and diode cut-in voltage, Vγ =0. Calculate the average output voltage.

analog-circuits-questions-answers-clamper-circuit-q5

a) 2V

b) 4V

c) -2V

d) -3V

Answer: c

Explanation: Maximum input is V m = 32 + 5 = 37 V

Capacitor charges up to 37 – 3 = 34 V

V out = V in – V c = 32 + 5 sinωt – 34 = -2 + 5sinωt

Average output voltage = – 2 V.

6. Considering a clamper circuit, where capacitance C, load R, the cut-in voltage of diode are unknown, which is the correct statement?

a) The DC level of the signal changes

b) The peak-to-peak value of signal changes

c) The shape of signal changes

d) The DC level shifts up

Answer: a

Explanation: The shape and peak to peak value of signal remain unchanged in a clamper. A clamper only affects the DC voltage level of the wave, which can be both moved up and down, not simply up.

7. Tilt of output waveform for the circuit is 1%. Given that input is a square wave ± 10 V, f = 2 kHz, diode cut-in voltage = 0.7, what is the relation between C and R?

analog-circuits-questions-answers-clamper-circuit-q7

a) RC=20

b) RC=1/2

c) RC=2

d) RC=1/20

Answer: d

Explanation: T o = 1/f = 1 ms; T discharge = 0.5 ms

Tilt = 100 *ΔV o /2V m = 100 *ΔV o /20 = 5 * ΔV o = 1

Thus ΔV o = 0.2 = I discharge * T discharge /C

I discharge /C = 0.2/T discharge = 0.2/0.5 ms = 400

RC = 2V m /400 = 20/400 = 1/20.

8. If input diode is an ideal diode. Which output waveform across R is valid for values of V1 from +2 to + 4 volts?

analog-circuits-questions-answers-clamper-circuit-q8

analog-circuits-questions-answers-clamper-circuit-q7

a) analog-circuits-questions-answers-clamper-circuit-q8a

b) analog-circuits-questions-answers-clamper-circuit-q8b

c) analog-circuits-questions-answers-clamper-circuit-q8c

d) analog-circuits-questions-answers-clamper-circuit-q8d

Answer: b

Explanation: The waveform cannot change its frequency since a clamper only effects DC level of waveform. Also, the peak-to-peak value of wave does not change due to a clamper.

Since the bias voltage starts from 2V, the output waveform cannot start from 0V.

9. Choose the correct option for the relation between the two circuits.

analog-circuits-questions-answers-clamper-circuit-q9

a) Circuit is a voltage doubler circuit, while Circuit does not double the voltage

b) Both are similar and double the voltage to 2V m

c) Circuit is a doubler circuit with output +2V m and Circuit is a doubler with output -2V m

d) Circuit is a doubler circuit, while Circuit is a clipper

Answer: c

Explanation: Both circuits are half-wave voltage doublers, in which capacitor C2 charges up to twice the positive ) peak for one half of the wave. Neither of the circuits acts as a clipper.

10. Consider the circuit shown. The input is a square wave ± 15 V, for a silicon diode and an output voltage swing of 30 V. Choose the validity of the statement. If the value of resistance R = 10KΩ and capacitance C = 1MF.

analog-circuits-questions-answers-clamper-circuit-q10

a) True

b) False

Answer: a

Explanation: The output voltage swing is always equal to the input voltage swing. The output swing doesn’t depend on the values of R and C. All values are valid, RC values only are changed to decrease the tilt /distortion.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Diode Approximations and Series Connection”.

1. Which of the following models of a semiconductor diode is the most widely used for the purpose of calculation?

a) Approximate Equivalent Model

b) Ideal Diode Model

c) Piecewise Linear Model

d) Hybrid model

Answer: a

Explanation: Approximate Equivalent model not only saves time and efforts but also provides results with a considerable amount of accuracy.

2. Which of the following statement holds true?

Statement-1: Piecewise linear model is generally not used for diode analysis.

Statement-2: The value of Rav is negligible as compared to the load resistance.

a) Statement-1 is true, Statement-2 is true and Statement-2 is a proper explanation for Statement-1

b) Statement-1 is true, Statement-2 is true and Statement-2 is not a proper explanation for Statement-1

c) Statement-1 is true, Statement-2 is false

d) Statement-1 is false, Statement-2 is true

Answer: a

Explanation: Piecewise linear model involves a line with a slope equal to 1/Rav. As Rav is low, 1/ Rav is high and the slope becomes almost equal to infinity and hence, it approaches the equivalent circuit model and hence, the piecewise linear model isn’t generally used.

3. From the given circuit diagram, considering the diode to be a silicon semiconductor diode, what is the magnitude of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q3

a) 43 mA

b) 0 mA

c) 4.3 mA

d) 5 mA

Answer: c

Explanation: I D = (V-V D )/R = 4.3 mA.

4. From the given circuit diagram, what is the value of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q4

a) 8 mA

b) 7.3 mA

c) 0 mA

d) 7 mA

Answer: c

Explanation: As both the diodes are reverse biased, the current in the circuit is zero.

5. From the given circuit diagram, what is the value of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q5

a) 8 mA

b) 0 mA

c) 7.3 mA

d) 7 mA

Answer: b

Explanation: As the silicon diode in the circuit is reverse biased, hence the current in the circuit is zero.

6. From the given circuit diagram, what is the value of diode current? Use an appropriate diode model.

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q6

a) 8 mA

b) 0 mA

c) 7.3 mA

d) 7 mA

Answer: d

Explanation: The diodes have a drop of 0.3V for Ge and 0.7V for Silicon in forward bias. We can use the constant voltage model, and hence in forward bias, the current flowing is

I D = (V-V D 1 -V D 2 )/R = 7 mA.

7. From the given circuit diagram, what is the value of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q7

a) 2 mA

b) 0 mA

c) 1.3 mA

d) 1 mA

Answer: b

Explanation: The diodes in forward bias, have drops of 0.3V for Ge and 0.7V for Si, and the total drops cancel out the source voltage, and hence the diode current is zero.

8. From the given circuit diagram, what is the value of voltage across the resistor?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q8

a) 2 V

b) 1.3 V

c) 1 V

d) 0 V

Answer: d

Explanation: The diodes in forward bias, have drops of 0.3V for Ge and 0.7V for Si, and the total drops cancel out the source voltage, and hence the diode current is zero. Hence voltage drop is also zero.

9. From the given circuit diagram, what is the value of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q9

a) 2.425 mA

b) 5.2 mA

c) 2.325 mA

d) 0 mA

Answer: c

Explanation: Here, I D =(V-V D )/R = 2.325 mA.

10. From the given circuit diagram, what is the value of voltage across R2?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q10

a) 9.324 V

b) 5.3 V

c) 0 V

d) 5.8125 V

Answer: d

Explanation: Here, current I=10-0.7/4k=2.325 mA

Here, V R 2 = I x R 2 = 5.8125 V.

11. From the given circuit diagram, what is the voltage across diode?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q11

a) 10 V

b) 5 V

c) 0.7 V

d) 0 V

Answer: a

Explanation: As the diode is reverse biased, the current in the circuit is zero and hence the voltage across the diode is equal to the source voltage = 10 V.

12. From the given circuit diagram, what is the value of diode current?

analog-electronic-circuits-questions-answers-diode-approximations-series-connection-q11

a) 2.425 mA

b) 5.2 mA

c) 2.325 mA

d) 0 mA

Answer: d

Explanation: As the diode is reverse biased, the current in the circuit is zero.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Diode Clipper and Clamper”.

1. What is the circuit in the given diagram called?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q1

a) Clipper

b) Clamper

c) Half wave rectifier

d) Full wave rectifier

Answer: a

Explanation: The circuit given above is a clipper. The diode conducts when it is forward biased, i.e, whenever the input v i is greater than 5V . For lower voltages, the diode does not conduct and the output is zero.

2. What is the circuit in the given diagram called?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q2

a) Clipper

b) Clamper

c) Half wave rectifier

d) Full wave rectifier

Answer: b

Explanation: During the positive half cycle, the diode is forward biased and no signal appears across the output. The capacitor holds the charge in that state. During negative cycle, diode is reverse biased and diode does not conduct. The charge in capacitor is released and is obtained at the output.

3. For a sinusoidal input of 20 V peak to the given circuit, what is the peak value of the output waveform?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q1

a) 20 V

b) 25 V

c) 0 V

d) -25 V

Answer: b

Explanation: In the given circuit, the output becomes zero for v i less than -5 V. Hence, the peak value of the output is 25 V owing to the additive effect of V for v i .

4. For the given circuit for a 20 V peak sinusoidal input v i , what is the value of v i at which the clipping begins?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q1

a) 5 V

b) 0 V

c) -5 V

d) Clipping doesn’t occur

Answer: c

Explanation: Considering the connection of diode, it is evident that the diode becomes reverse biased when v i < -5 V. Hence, clipping starts at -5 V.

5. For a sinusoidal input of 20 V peak to the given circuit, what is the minimum value of the output waveform?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q1

a) 20 V

b) 25 V

c) -25 V

d) 0 V

Answer: d

Explanation: The given circuit is a clipper that cuts off a part of the negative cycle of the input sinusoid i.e. the output becomes zero for a certain region of the input waveform. Hence, the minimum value is 0 V.

6. For the given input waveform to the given circuit, what is the peak value of the output waveform?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q6

a) 0 V

b) 16 V

c) 12 V

d) 0 V

Answer: b

Explanation: In the given circuit, the diode is in the off stage when v i > 4 V. Hence, when v i > 4 V, v o = v i and hence the peak value of v o = the peak value of v i = 16 V.

7. For the given input waveform to the given circuit, what is the minimum value of the output waveform?

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q6

a) 4 V

b) 16 V

c) 12 V

d) 0 V

Answer: a

Explanation: The circuit above is a parallel clipper. When the input is less than 4V, then diode is forward biased and thus output voltage is 4V. When input increases above 4V, the diode is reverse biased and output is equal to the input. Hence, minimum output is 4V.

8. Which of the following is not a necessary component in a clamper circuit?

a) Diode

b) Capacitor

c) Resistor

d) Independent DC Supply

Answer: d

Explanation: Diode, Capacitor and Resistor are necessary to build a clamper circuit. An independent DC supply is required to bring an additional shift.

9. For the given circuit, what is the minimum peak value of the output waveform if the input waveform is 10V square wave with switching time of 1 second?

Assume that the input switches between +10V and -10V DC levels.

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q2

a) 0 V

b) -5 V

c) -20 V

d) -10 V

Answer: c

Explanation: For the positive half of the input, the diode is in the on state and hence acts as a short circuit and hence v o = 0 V. For the negative half cycle, the resistor receives voltage input both from the source and the capacitor which is charged during the positive half of the input. Hence, v o = -20 V.

10. For the given circuit and input waveform, the peak value of the output is +30V.

analog-electronic-circuits-questions-answers-diode-clipper-clamper-q10

a) True

b) False

Answer: a

Explanation: The given circuit is a clamper with an independent DC supply of +10 V. Keeping in mind the connection of the diode and the DC supply, we see that the output waveform is clamped at +10V i.e. it shifts up by +10V. Hence, the maximum value of v o =+30 V.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Diode Gates and Rectifiers”.

1. What is the logic gate implemented in the following circuit?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q1

a) OR

b) AND

c) NOT

d) NOR

Answer: a

Explanation: In the given circuit, as a logic gate, E1 and E2 are digital inputs, 1 or 0. If the input is 1, the diode is forward biased and conducts, else it is reverse biased. So, the output is high whenever either of the input is high, or both of them are high, hence it acts as an OR gate.

2. What is the logic gate implemented in the following circuit?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q2

a) OR

b) AND

c) NOT

d) NOR

Answer: b

Explanation: Whenever either diode is forward biased, there is a path for the current to flow out of and hence the output is zero. Thus if either A or B are 0, then output is zero. If however, both A and B are equal to VSS or more, then the diodes are reverse biased and output is available. Hence the circuit acts as an AND gate.

3. Which of the following statements best describes the reason for not using diodes to implement logic gates?

a) Diodes are expensive

b) Diodes are unreliable and less efficient

c) The diode circuits have limited range of operation

d) Diodes are bulky for a logic gate

Answer: c

Explanation: The diode circuits are relatively less stable when compared to the transistor circuits, which are easy to tune in terms of stability and reliability.

4. In the given circuit, what is the output V 0 if E 1 = 10V and E 2 = 0V?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q1

a) 0 V

b) 0.7 V

c) 10 V

d) 9.3 V

Answer: d

Explanation: Here, current through the grounded branch = /1k = 9.3 mA. Hence, voltage drop across the resistor=9.3 V. Hence, V0 = 9.3V.

5. In the given circuit, what is the ideal output V 0 if E 1 = 10V and E 2 = 0V?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q5

a) 0 V

b) 0.7 V

c) 10 V

d) 9.3 V

Answer: c

Explanation: In an ideal diode, the voltage drop is zero. Hence, complete voltage 10V appears across the resistor and as the output too.

6. A 12 V, 50 Hz sine wave is fed to the given circuit as input? What is the output for 0.01s < t < 0.02s?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q6

a) True

b) False

Answer: b

Explanation: The given circuit is that of a half wave rectifier in which the diode remains in the off state for the negative half and conducts for positive half. During the time 0.01 sec to 0.02sec, the input 12sin is positive, hence a certain output not equal to zero is available.

7. Which circuit has been represented in the associated circuit diagram?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q7

a) Half wave rectifier

b) Full wave rectifier

c) NOT gate

d) AND gate

Answer: a

Explanation: Both the diodes are similarly biased and are in series. Hence, they form a half wave rectifier.

8. Which circuit has been represented in the associated circuit diagram?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q8

a) Half wave rectifier

b) Full wave rectifier

c) NOT gate

d) AND gate

Answer: b

Explanation: In the given circuit, when the diode D 1 is on, diode D 2 is off and vice versa. Hence, the upper diode conducts during the positive half of the input cycle and the lower diode conducts during the negative half of the input cycle and hence, it is a full wave rectifier circuit.

9. What is the value of DC equivalent output voltage for the given circuit, given that the input voltage is 20 V p-p and 50 Hz and the diode is a silicon diode?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q9

a) 2.9574 V

b) -2.9574 V

c) -3.125 V

d) 0 V

Answer: b

Explanation: Vdc is given by 0.318(V p ). Here V p = 10-0.7 V = 9.3 V and hence, V dc = 0.318 x 9.3 V = 2.9574 V. Now, as the output I s non zero only for the negative half cycles of the input, V dc = -2.9574 V.

10. Which of the following equations is correct for a full wave rectified output?

a) |V dc | = 0.318 V p

b) |V dc | = 0.636 V p

c) |V dc | = 0.477 V p

d) |V dc | = 0.211 V p

Answer: b

Explanation: The output dc level of a half wave rectified wave is equal to 0.318 Vp. But, for a fully rectified wave, it becomes equal to 0.636 of the peak value.

11. Which of the following statements are true about the given circuit?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q11

a) The circuit is that of a bridge rectifier

b) The PIV of the diode D1 must be greater than v0 for the circuit to function as a bridge rectifier

c) For silicon diodes, the value of v 0 =(v i -1.4) V

d) All of the mentioned

Answer: d

Explanation: The circuit is that of a bridge rectifier. For proper functioning, the PIV of diodes must be at least greater than v0 and since, the current through any path flows through 2 diodes. There is a drop of 1.4 V.

12. In the given circuit, what will be the nature of the output waveform?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q12

a) Half rectified

b) Full rectified

c) Sinusoidal

d) DC

Answer: b

Explanation: The right diode conducts during the positive half of the input cycle and the left diode conducts during the negative half of the input cycle. Hence, the output will be a fully rectified wave.

13. In the given circuit, what is the value of Vp for the output wave, if the input fed is 20 V p-p ?

analog-electronic-circuits-questions-answers-diode-gates-rectifiers-q13

a) 10 V

b) 9.3 V

c) 5 V

d) 4.7 V

Answer: c

Explanation: As is clear from the circuit that v 0 = 0.5 v i and hence peak value of the output wave is equal to half of the peak value of the input wave and hence V p = 10/2 = 5 V.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Diode Basics and Equivalent Circuits”.

1. Which of the following is not a valid form of a diode equivalent circuit?

a) Piecewise Linear Model

b) Ideal Diode Model

c) Simplified Model

d) Differential Model

Answer: d

Explanation: Differential model doesn’t define any diode. It defines an Operational Amplifier.

2. Which model of the diode equivalent circuit is represented by the given diagram?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q2

a) Piecewise Linear Model

b) Ideal Diode Model

c) Simplified Model

d) Differential Model

Answer: a

Explanation: This model involves a voltage drop and a resistance in series with an ideal diode and hence it represents the Piecewise Linear Model.

3. From the given I-V characteristics of a silicon diode, what is the approximate value of r av between marked points?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q3a

a) 7 ohms

b) 11.2 ohms

c) 8 ohms

d) 6 ohms

Answer: a

Explanation: r av is the average AC resistance, found between two marked points in the I-V graph. Here r av =0.1/14mA=7Ω.

4. AC resistance of a diode was found to be r 1 and r 2 , when measured with two different values of diode current i.e. 10 mA and 25 mA respectively, for the same diode voltage. Which of the following options hold true?

a) r 1 = r 2

b) r 1 > r 2

c) r 1 < r 2

d) Can’t be determined

Answer: b

Explanation: r 1 > r 2 as AC resistance is inversely proportional to the diode current.

5. Which of the following models of diode equivalent circuit is represented by the given I-V characteristic curve?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q5

a) Piecewise Linear Model

b) Ideal Diode Model

c) Simplified Model

d) Hybrid model

Answer: c

Explanation: In simplified model, the value of rd is neglected and hence, we get a high value of current for voltage greater than or equal to VT.

6. What is the approximate value of voltage across the silicon diode for the diagram given?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q6

a) +0.7 V

b) 0 V

c) +10 V

d) -10 V

Answer: d

Explanation: -10 V. The operating characteristic of a diode operating in the reverse bias region suggests that beyond a certain threshold current, the voltage across the diode is nearly constant = reverse breakdown voltage.

7. Assuming the diode in the given circuit diagram to be a silicon p-n junction diode, what is the current for the given circuit diagram?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q7

a) 4.3 mA

b) 0

c) 43 mA

d) 5 mA

Answer: b

Explanation: The diode in the circuit is reverse biased and hence the current is zero.

8. Assuming the diode in the given circuit diagram to be a silicon p-n junction diode, what is the current for the given circuit diagram?

analog-electronic-circuits-questions-answers-diode-basics-equivalent-circuits-q8

a) 0

b) 5 mA

c) 4.3 mA

d) Can’t be determined

Answer: c

Explanation: 4.3 mA. The silicon diode in the circuit is forward biased. Considering a voltage drop of 0.7 V across the diode, the voltage drop across the resistor is V = 4.3 V. Hence, Current in the circuit = Current through the resistor = A = 4.3 mA.

9. The reverse saturation current for a Germanium diode at a temperature of 293 K is found to be 2 μA. What is the reverse saturation current I s at a temperature of 313 K?

a) 2 μA

b) 8 μA

c) 4 μA

d) Can’t be determined

Answer: b

Explanation: The reverse saturation current for a silicon diode doubles its value for every 10 K rise in temperature. Hence I s at 313 K=2 x 2 x 2 = 8 uA.

10. During the reverse bias operation of a p-n junction diode, the width of the depletion region increases. Is the given statement true or false?

a) True

b) False

Answer: a

Explanation: During reverse bias operation of a diode, the width of the depletion region increases leading to extremely high values of resistance and hence negligible values of current.

11. The threshold voltage of a diode at Antarctica and India were found to be V 1 and V 2 respectively. Which of the following relations between V1 and V2 hold good?

a) V 1 > V 2

b) V 1 = V 2

c) V 1 < V 2

d) Can’t be determined

Answer: a

Explanation: Temperature in India is greater than that in Antarctica. Hence, the reverse saturation current measured in India will be higher as compared to that measured in Antarctica. Now, as Is and VT are inversely related, V1 >V2.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Parallel and Series Configuration”.

1. From the given circuit, what is the value of current flowing through the 1 k resistor parallel to the diodes?

analog-electronic-circuits-questions-answers-parallel-series-combination-q1

a) 10 mA

b) 9.3 mA

c) 8.6 mA

d) 0 mA

Answer: a

Explanation: As both the diodes are reverse biased. Voltage drop across the resistor = 10 V. Hence, current = 10 V/1 k = 10 mA.

2. From the given circuit, what is the value of current flowing through the 1 k resistor?

analog-electronic-circuits-questions-answers-parallel-series-combination-q2

a) 0 mA

b) 10 mA

c) 9.3 mA

d) 0.7 mA

Answer: d

Explanation: As one of the diodes is forward biased, voltage drop across it = 0.7 V. Now, as this diode is in parallel with the given resistor, voltage across resistor = 0.7 V => current = 0.7 mA.

3. In the given circuit, what is the value of current flowing through the forward biased diode?

analog-electronic-circuits-questions-answers-parallel-series-combination-q3

a) 10 mA

b) 9.3 mA

c) 8.6 mA

d) 0 mA

Answer: c

Explanation: Here, current flowing through R 2 = /1k = 9.3 mA. Also the current through the parallel resistor=0.7 mA. Hence the current through the forward biased diode = = 8.6 mA.

4. In the given circuit, what is the value of current flowing through the diode D 2 ?

analog-electronic-circuits-questions-answers-parallel-series-combination-q4

a) 0 mA

b) 10 mA

c) 9.3 mA

d) 8.6 mA

Answer: a

Explanation: As the diode D2 is reverse biased, the current flowing through it = 0 mA.

5. In the given circuit, what is the value of the current through the series resistor R 2 ?

analog-electronic-circuits-questions-answers-parallel-series-combination-q5

a) 9.3 mA

b) 10 mA

c) 0 mA

d) 8.6 mA

Answer: a

Explanation: The voltage across the diodes is 0.7 V as they are forward biased. Hence, the current through the series resistor = /1k = 9.3 mA.

6. In the given circuit, what is the current through the parallel resistor?

analog-electronic-circuits-questions-answers-parallel-series-combination-q5

a) 9.3 mA

b) 0.7 mA

c) 8.6 mA

d) 0 mA

Answer: b

Explanation: As the resistor is in parallel with the diodes, the voltage that appears across it is 0.7 V. Hence, current = 0.7 mA.

7. In the given circuit, what is the value of current through R?

analog-electronic-circuits-questions-answers-parallel-series-combination-q7

a) 0.7 mA

b) 0.3 mA

c) 1 mA

d) 10 mA

Answer: b

Explanation: The source voltage initially increases from 0-10 V. As the source voltage increases, the voltage across the diodes also increases. When the voltage across the diodes reaches a value of 0.3 V, the Germanium diode starts conducting, whereas the silicon diode is still in the off state. Hence, the voltage across R = 0.3 V. Hence, current = 0.3 mA.

8. In the given circuit, what is the value of current through R 2 ?

analog-electronic-circuits-questions-answers-parallel-series-combination-q7

a) 9.3 mA

b) 9.7 mA

c) 10 mA

d) 0 mA

Answer: b

Explanation: Here, the voltage across R=0.3 V, hence, current through R 2 = V/ 1 k = 9.7 mA.

9. In the given circuit, what is the value of current through the silicon diode?

analog-electronic-circuits-questions-answers-parallel-series-combination-q7

a) 9.3 mA

b) 9.7 mA

c) 10 mA

d) 0 mA

Answer: d

10. In the given circuit, what is the value of current through the germanium diode?

analog-electronic-circuits-questions-answers-parallel-series-combination-q7

a) 9.4 mA

b) 9.7 mA

c) 0.3 mA

d) 0 mA

Answer: a

Explanation: Current through R 2 = 9.7 mA. Also, current through R = 0.3 mA, current through the silicon diode = 0 mA. Hence, from the KCL, we get the current through the germanium diode to be 9.4 mA.

11. In the given circuit, by what amount does the current across R change when the Germanium diode is reconnected in the reverse-bias mode?

analog-electronic-circuits-questions-answers-parallel-series-combination-q7

a) 0 mA

b) 0.7 mA

c) 0.4 mA

d) 0.3 mA

Answer: c

Explanation: When the germanium diode is forward biased, current through R = 0.3 mA. When the Germanium diode is reverse biased, current through R = 0.7 mA. Hence, change in current = 0.4 mA.

12. In the given circuit, if the diode D2 is a Germanium diode and all other diodes are Silicon diodes, then which of the following statements is true?

analog-electronic-circuits-questions-answers-parallel-series-combination-q12

a) I D2 < I D3 ; I D2 = I D1

b) I D2 > I D3 ; I D2 > I D1

c) I D2 > I D3 ; I D2 = I D1

d) I D2 > I D3 ; I D2 < I D1

Answer: c

Explanation: Voltage across the parallel diodes = 0.3 V. Hence, current through D3 = 0. Hence I D2 > I D3 . Also, as both the parallel silicon diodes are in parallel and in off-state, the diodes 1 and 2 are in series and hence, current through them is same.

13. In the circuit, considering the diode 1,4 to be a Germanium diode and the diodes 2,3 to be silicon, which of the following statements are true?

analog-electronic-circuits-questions-answers-parallel-series-combination-q12

a) I D 1 = I D 2

b) I D 1 = I D 3

c) I D 1 = I D 4

d) I D 1 > I D 4

Answer: c

Explanation: In the given circuit, the silicon diodes are in off-state as the voltage across them is 0.3 V. Hence, they act as open circuit and the diodes 1 and 4 are in series and hence the current through diodes 1 and 4 is same.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Types of Diode and their Testing”.

1. Which of the following equipment can’t be used to check the condition of a diode?

a) Digital Display Meter

b) Ohmmeter

c) Curve Tracer

d) CRO

Answer: d

Explanation: All the methods may be used to test a diode for its proper functioning except CRO.

2. What is the expected reading obtained on a Digital Display Meter with diode-checking function when a proper functioning silicon semiconductor diode is connected across its leads in the forward bias configuration?

a) 0.67 V

b) 0.3 V

c) Open Loop Indication

d) Varies with the diode

Answer: a

Explanation: The diode checking function on the meter when used causes a current of 2 mA to flow through the diode and hence under forward bias, the voltage is determined to be 0.67 V. Germanium diodes show a drop around 0.3V.

3. What is the expected reading obtained on a Digital Display Meter with diode-checking function when a proper functioning silicon semiconductor diode is connected across its leads in the reverse bias configuration?

a) 0.67 V

b) 0.3 V

c) Open Loop Indication

d) Varies with the diode

Answer: c

Explanation: The diode checking function on the meter when used causes a current of 2 mA to flow through the diode and hence under reverse bias, the result obtained is the open loop indication.

4. A diode on being checked by a DDM with diode checking function results in an open loop indication in both directions. Which of the following is the correct inference drawn from the given situation?

a) Power failure to the DDM

b) Diode is faulty

c) Diode is proper

d) Device isn’t connected properly

Answer: b

Explanation: A diode allows electrical conduction in just one direction. Hence, if an instrument shows an open loop indication in both the directions, then the diode is faulty.

5. A silicon semiconductor diode when subjected to ohmmeter testing gives low resistance in both directions. Which of the following is the correct inference to be drawn?

a) Diode is faulty

b) Power failure to the Ohmmeter

c) Diode is short-circuited

d) Diode is open circuited

Answer: c

Explanation: A proper diode gives a low resistance reading along one direction and high resistance reading along the other. Hence, if diode gives low resistance readings in both directions, then the diode must be short-circuited. It’s noteworthy that a faulty diode gives a high resistance reading along both paths.

6. A silicon semiconductor diode when subjected to ohmmeter testing gives high resistance in both directions. Which of the following is the correct inference to be drawn?

a) Diode is faulty

b) Power failure to the Ohmmeter

c) Diode is short-circuited

d) Diode is open circuited

Answer: a

Explanation: A proper diode gives a low resistance reading along one direction and high resistance reading along the other. Hence, if diode gives high resistance readings in both directions, then the diode must be faulty.

7. How can the location of the Zener region be controlled in the diode characteristic curve?

a) By changing the value of Iz

b) By changing the doping concentration of the diode

c) By changing the operating temperature

d) By increasing the size of diode

Answer: b

Explanation: An increase in doping will lead to an increase in the concentration of impurities, which would further lead to a change in V Z and hence change in the Zener region.

8. Which material is generally used for the manufacture of Zener diode?

a) Silicon

b) Germanium

c) Mercury

d) Arsenic

Answer: a

Explanation: Because of its high heat and current handling capacity, Silicon is generally used for the manufacture of Zener diodes.

9. Which of the following is not a part of the equivalent circuit of a Zener diode?

a) Dynamic Resistance

b) DC Battery

c) Ideal diode

d) Piecewise linear model of diode

Answer: c

Explanation: The equivalent circuit diagram of a Zener diode doesn’t involve an ideal diode as it is used under reverse bias and an ideal diode doesn’t conduct under reverse bias.

10. At 298 K, the nominal Zener voltage is found to be equal to 10 V. Given that the value of the temperature coefficient is 0.072 , what is the nominal Zener Voltage at 398 K?

a) 9.46 V

b) 9.54 V

c) 0.54 V

d) 10.54 V

Answer: d

Explanation: The change in V Z with temperature is calculated from the following equation:

Change in V Z = T C .V Z (T 1 – T 0 ))/1000

Change in V Z = 0.54 V

Now, as the value of T is positive, new V Z = 10 + 0.54 V = 10.54 V.

11. Which of the following materials is used to make LEDs?

a) Silicon

b) GaAsP

c) Germanium

d) Selenium

Answer: b

Explanation: In Silicon and Germanium, the major chunk of energy is given off as heat the hence the emitted light isn’t significant. In Gallium Arsenide Phosphide , the number of photons are enough to create a visual source of light.

12. Which of the following voltages may be considered as a safe and sufficient voltage for the operation of a LED?

a) 0.7 V

b) 5 V

c) 2.7 V

d) -5 V

Answer: c

Explanation: The safe and sufficient operating voltage range for LED is between 1.7 V to 3.3 V. Hence, 2.7 V is the best option.

13. What is the order of magnitude of the response time of LED?

a) 10 -6

b) 10 -9

c) 10 -15

d) 10 -3

Answer: b

Explanation: The response time of a LED is typically in the order of nanoseconds.

14. Which of the following is not an advantage of using a LED?

a) High response time

b) Compatibility with solid-state circuits

c) Rugged construction and high lifetime

d) No need for a heat sink in long run

Answer: d

Explanation: The response time of a LED is typically in the order of nanoseconds. The operating voltage range for LED is between 1.7 V to 3.3 V which makes it compatible with solid-state circuits. Also, the semiconductor construction makes them rugged. However, in the long run, an adequate heat sink is required for longevity.

15. A LED will glow if connected under reverse bias configuration.

a) True

b) False

Answer: b

Explanation: A Light Emitting Diode works just like any other diode and hence it does not conduct under reverse bias operation and hence the LED will not glow.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Active and Passive Devices”.

1. An active device is one which ___________

a) Mechanically controls electron flow

b) Electrically controls electron flow

c) Pneumatically controls electron flow

d) Automatically controls electron flow

Answer: b

Explanation: An active device is any type of circuit component with the ability to electrically control electron flow . For a circuit to be properly called electronic, it must contain at least one active device.

2. Which of the following elements comprise of the passive devices?

a) Resistors, Capacitors and SCRs

b) Vacuum Tubes, SCRs and Diodes

c) Transformers, Inductors and Diodes

d) Transformers, TRIACs and DIACs

Answer: c

Explanation: A passive device is any type of circuit component which cannot control the flow of electrons by means of any electric control. All these devices do not have the ability to electrically control the flow of electrons.

3. A transistor is a current controlled device because_______________

a) In the base region movement of charge carrier is because of the electrons which are minority charge carrier in the base region

b) In the collector region movement of charge carrier is because of the electrons which are minority charge carrier in the collector region

c) In the base region movement of charge carrier is because of the holes which are majority charge carrier in the base region

d) In the collector region movement of charge carrier is because of the holes which are majority charge carrier in the base region

Answer: a

Explanation: In the base region movement of charge carrier is because of the electrons which is minority charge carrier in the base region. So, a BJT can said to be minority current controlled device. Base current flows between base and emitter in the BJT to induce a larger current flow between emitter and collector.

4. Active devices can also be used as_________

a) Amplifiers

b) Choppers

c) Converters

d) Inverters

Answer: a

Explanation: Active devices may be employed to a govern large amount of power by application of small amount of power. This behaviour is known as amplification. Therefore, active devices can be used as amplifiers.

5. How do amplifiers work without violating Law of Conservation of Energy?

a) They amplify one factor of the input and reduce others

b) They work on the law of conservation of mass

c) They violate the Law of Conservation of Energy

d) They amplify the signal by taking an input from an external source

Answer: d

Explanation: The Law of Conservation of Energy is not violated because the additional power is supplied by an external source, usually a DC battery or equivalent. The amplifier neither creates nor destroys energy, but merely reshapes it into the waveform desired.

6. The overall gain of multiple amplifiers in cascade can be expressed as__________ (A 1 , A 2 , A 3 are individual gains)

a) A 1 -A 2 -A 3

b) A 1 +A 2 +A 3

c) A 1 /A 2 *A 3

d) A 1 *A 2 *A 3

Answer: d

Explanation: Gain can be voltage, current or power. Thus, when we put multiple stages in cascade the total gain will be the product of gains at individual stages. This is because the gain in successive stages increases greatly because of multiplication.

7. To overcome the problem of representation of large values of gain, which of the following units was introduced?

a) Decibels

b) Joules

c) Pascals

d) Farads

Answer: a

Explanation: Since 1dB=log 10 (A 2 /A 1 ) it is a logarithmic scale of representation and very large values can be expressed by smaller numbers. Decibels is a convenient unit of measurement for a variety of applications.

8. Attenuators are active devices.

a) True

b) False

Answer: b

Explanation: Attenuators weaken or attenuate the high-level output of a signal generator and thus cannot control the signals electronically. This makes them passive devices and they can only be present in a circuit with an active device.

9. Tunnel diode can be used as an active device because__________

a) its negative resistance region is used

b) it conducts at a faster rate

c) it triggers the flow of electrons in reverse bias

d) of tunneling effect

Answer: a

Explanation: It is an active device since its impedance is positive and the V-I characteristics lie in the first & second quadrants, tunnel diodes can be used as an active device even though it is a diode which falls under the category of passive devices.

10. The unit of gain is ________

a) Joules

b) Decibels

c) Its unit less

d) Watts

Answer: c

Explanation: Gain is the ratio of same type of values i.e. either volt/volt or current/current or watts/watts thus this makes it unit less. If it is expressed in decibels i.e. on a logarithmic scale, then they have the unit dB.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Operating Point of Transistor”.

1. Reverse saturation current of a common emitter transistor is __________

a) Collector current when emitter is open circuited and base-collector junction is reverse biased

b) Emitter current when collector is open circuited and base-collector junction is reverse biased

c) Base current when emitter circuit is open circuited and emitter-collector junction is reverse biased

d) Collector current when base circuit is open circuited

Answer: a

Explanation: Reverse saturation current is the collector current when emitter is open circuited and base-collector junction is reverse bias mode. In this mode of operation collector-base junction act as a reverse biased diode. The current in this reverse biased junction is known as reverse saturation current.

2. Reverse collector saturation current I CBO is __________

a) Collector current when emitter current is zero

b) Collector current when base current is zero

c) Same as reverse saturation current

d) Collector current when either emitter or base current is zero

Answer: a

Explanation: Reverse collector current ICBO is collector-base current when emitter is open. This is same as reverse saturation current in ideal but have slight difference in practical.

3. Reverse collector saturation is greater than Reverse saturation current because of reverse collector saturation __________

a) Is ideal

b) Doesn’t include leakage current

c) They are same

d) Include avalanche multiplication current which is caused by the collision in collector junction

Answer: d

Explanation: One of the reasons why reverse collector current exceeds the reverse saturation current is the introduction of avalanche multiplication current in the base collector junction. This happens when high energy electron collides in the lattice it creates more number of electron and thus a greater current. Another major reason is the presence of surface leakage currents flowing in the reverse collector saturation.

4. Reverse collector saturation is greater than Reverse saturation current because reverse collector saturation __________

a) Is ideal

b) Consist leakage current flowing through junction and surface

c) Doesn’t include avalanche multiplication current opposing collector current

d) They are same

Answer: b

5. Which of the following statement about a common base transistor is true?

a) Very low input impedance

b) Very low output Impedance

c) Current gain is greater than unity

d) Voltage gain is very low

Answer: a

Explanation: Common base transistor has very low input resistance . It also has very high output resistance. Its current gain is less than unity and it has a medium voltage gain.

6. Which of the following statement about a common emitter transistor is true?

a) Very high input resistance

b) High output resistance

c) Current gain is less than unity

d) Voltage gain is very low

Answer: b

Explanation: Common emitter transistor has high output resistance . It has low input resistance . Current gain is high . Voltage gain is medium.

7. Which of the following statement about a common collector transistor is true?

a) Very low input impedance

b) Very high output impedance

c) Unity current gain

d) Unity voltage gain

Answer: d

Explanation: Common collector configuration has high input impedance and low output impedance. The current gain is high but voltage gain is low, almost equal to unity.

8. Which of the following configuration is used as input stage of the multistage amplifier?

a) Common base configuration

b) Common emitter configuration

c) Common collector configuration

d) All configurations are equally suited

Answer: a

Explanation: Since input resistance is low and output resistance is high common base configuration is used as an input stage of the multistage amplifier. Common emitter configuration is used for audio signal amplification. Common collector is used for impedance matching.

9. Which of the following configuration is used for audio signal amplification?

a) Common base configuration

b) Common emitter configuration

c) Common collector configuration

d) All configurations are equally suited

Answer: b

Explanation: Common base configuration is used as input stage of multistage amplifier since it has low input resistance and high output resistance. Since voltage gain is high, common emitter configuration is used for audio signal amplification. Common collector is used for impedance matching since the voltage gain is unity.

10. Which of the following configuration is used for impedance matching?

a) Common base configuration

b) Common emitter configuration

c) Common collector configuration

d) All configurations are equally suited

Answer: c

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Transistor Bias Configuration”.

1. BJT is biased to _________

a) Work as a switch

b) Prevent thermal runaway

c) Increase DC collector current

d) Operate it in the saturation region

Answer: b

Explanation: A BJT is biased to operate in the active region, to work as an amplifier. It is not biased in the cut-off or saturation region to work as a switch. Also, biasing is done to maintain a stable collector current so that the operating point does not change. This also prevents thermal runaway.

2. For the given circuit, β = 150.

analog-circuits-questions-answers-transistor-bias-configuration-q2

Fig. 1 has stability factor S1

If the above circuit is changed to below circuit

analog-circuits-questions-answers-transistor-bias-configuration-q2a

Fig. 2 having stability factor S2

Choose the correct option which is having better stability with S1 and S2 Values.

a) S2 = 151, S1 = 150. Circuit 1 has better stability

b) S2 = 100, S1 = 10 Circuit 2 has better stability

c) S2 = 151, S1 = 10.3 Circuit 1 has better stability

d) S2 = 151, S1 = 10.3 Circuit 2 has better stability

Answer: c

Explanation: The above circuits are a collector to base bias circuits, where stability factor

\(S = \frac{1+β}{\frac{1+βR_C}{R_C+R_B}}\)

Thus, in the question, S1 =\( \frac{1+150}{1 + \frac{150*10}{110}} = \frac{151}{14.63}\) = 10.32

However, in circuit 2, which is a transformer coupled amplifier, R C = 0

Thus, S2 = 1+150 = 151.

3. Consider the biasing circuit shown. The β for the circuit is large. R3 = 1kΩ, R4 = 2kΩ. The stability factor varies between 10 and 11. Find the maximum and minimum values of R2.

analog-circuits-questions-answers-transistor-bias-configuration-q3

a) Minimum = 16.36kΩ, Maximum = 20kΩ

b) Minimum = 16.36kΩ, Maximum = 18kΩ

c) Minimum = 10 kΩ, Maximum = 20kΩ

d) Minimum = 6 kΩ, Maximum = 10kΩ

Answer: a

Explanation: Circuit is a self bias circuit.

Base resistance = R B = R1*R2 /

Since β is large, stability factor, S = 1 + R B /R E = 1 + R B /R3

1 + R B /R3 = 10

R B /R3 = 9 => R B = 9k => R2 = 16.36 kΩ

For S = 11

R B /R3=10 => R B = 10k => R2 = 20kΩ.

4. Choose the incorrect option according to self bias circuit?

a) Voltage gain increases

b) Stability factor is independent of collector resistance

c) BJT can be used in either of the three configurations

d) Excellent stability in collector current is achieved

Answer: d

Explanation: In a self bias circuit, due to emitter resistance a negative feedback exists. This decreases voltage gain. Also, stability factor S does not depend on collector resistance, only on base and emitter resistance and β, if required. \(S = \frac{}{R_B + R_E}\).

S is least in self bias circuit, hence excellent stability is achieved.

5. In the circuit given, the two Si transistors are similar. Given β=50, Vcc=12V, I1=5mA. Find I?

analog-circuits-questions-answers-transistor-bias-configuration-q5

a) 5 mA

b) 4.807 mA

c) 4.5 mA

d) 5.2 mA

Answer: b

Explanation: The circuit is a current mirror circuit. Both transistors are similar. I1= I REF = 5 mA

Β is not large so 2/β is not negligible.

Thus current I = I1/ = 5mA/ = 4.807 mA.

6. Given V out = 5V, β=100, I1=10mA, R1=100KΩ. Find the output resistance.

analog-circuits-questions-answers-transistor-bias-configuration-q5

analog-circuits-questions-answers-transistor-bias-configuration-q6

a) 8 kΩ

b) 8.163 kΩ

c) 7.582 kΩ

d) 8.4 kΩ

Answer: b

Explanation: The circuit is a current mirror, whose output resistance, R OUT = (V A + V CE )/I OUT

Here, I OUT = I1 / = 10mA / = 9.8 mA

V CE = V OUT = 5V

V A = Early voltage = 75 V

R OUT = (V A + V CE )/ I OUT = / 9.8 * 10 -3

R OUT = 80,000/9.8 = 8.163 kΩ.

7. Why is self bias circuit not used in IC amplifier?

a) To reduce power losses

b) To reduce area used on the chip

c) Stability factor reduces in the IC

d) Voltage gain is reduced

Answer: b

Explanation: Self biased circuits are not preferred in IC amplifiers because they need large resistances R1 and R2, since then S will be smaller and stability will be more. However, using large resistances in ICs means a requirement of larger chip area, so to reduce this area requirement, we use current mirror circuits instead.

8. Considering all transistors to be similar and β is very large, when I1 = 10 mA, find current I2.

analog-circuits-questions-answers-transistor-bias-configuration-q8

a) 10 mA

b) 50 mA

c) 25 mA

d) 20 mA

Answer: c

Explanation: Let current through the transistor Q1/Q2 be I C . Since both are similar, we can say that,

I C = I1/2

Similarly, current through transistors Q3 to Q7 is assumed to be I C ’, where I C ’ = I2/5

Since all transistors are similar. I C = I C ’

I2 = 5I C ’ = 5 I C = 2.5*I1.

9. Consider the following circuit, where the transistors are similar Si transistors. Given I1 = 2mA, I2 = 1μA, Vcc = 12 V, find R1 and R2.

analog-circuits-questions-answers-transistor-bias-configuration-q9

a) R1 = 10kΩ, R2 = 6kΩ

b) R1 = 5.6kΩ, R2 = 20kΩ

c) R1 =18kΩ, R2 = any value

d) R1 = 18kΩ, R2 = 5.6kΩ

Answer: d

Explanation: R2 = (V cc – V BE )/I1 = /2m = 5.65 kΩ – Using KVL

Also, I2*R1 = V T ln = 0.026 * ln

Thus, R1 = 0.026*ln/1μ = 18 kΩ.

10. Widlar current source was introduced to obtain a smaller output current.

a) True

b) False

Answer: a

Explanation: In a current mirror circuit, to obtain lower values of output current, the resistance values required to increase a lot, which becomes difficult to manufacture on an IC. Instead, we use a widlar current source, where an emitter resistance is also present, affecting the output current.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Transistor Switching Network”.

1. At saturation, which of these is not true for a BJT?

a) The collector current I C cannot increase further

b) The base current I B , cannot increase further

c) The collector-to-emitter voltage, V CE is due to the non-zero internal resistance of BJT

d) V CE is the minimum voltage drop between C and E

Answer: b

Explanation: At saturation, the collector-to-emitter voltage is the minimum drop possible occurring due to the non-zero internal resistance of the BJT. Since it cannot decrease further, the current I C cannot increase further. The BJT is said to be saturated. However, the base current, I B , can keep increasing with the input voltage and hence, in saturation, the relation I C = βI B is not satisfied.

2. For a transistor in saturation, which is true?

a) I C = βI B

b) I C > βI B

c) I C < βI B

d) I C = I B

Answer: c

Explanation: At saturation, collector current remains constant. However, the base current increases with the input voltage being applied and hence BJT cannot satisfy the relation I C = βI B . In the saturation region, βI B > I C is the correct relation.

3. Given that the BJT is completely saturated, what is the overdrive?

a) Overdrive = 1

b) Overdrive < 1

c) Overdrive > 1

d) Overdrive > 0

Answer: c

Explanation: Overdrive during BJT saturation is the ratio of its normal β and its forced β. Forced β is the ratio of I C and I B when BJT is in saturation. Since in saturation I C is constant and I B increases thus, I C /I B decreases and the forced β is less than the normal β. Hence the overdrive > 1. In hard/strong saturation, β>>1.

4. Consider the graph of I C vs V I shown below for a transistor. Find the correct relation for region 3 in the diagram.

analog-circuits-questions-answers-transistor-switching-network-q4

a) I C = I C and V CE = V CE

b) I C = I C and V CE = V CC

c) I C = βI B and V CE = V CE

d) I C = βI B and V CE = V CC

Answer: a

Explanation: Region 3 in the above is the saturation region in which I C remains constant with respect to the input voltage and the voltage V CE is the saturation voltage, almost zero. At this point, the transistor acts as an ON switch.

5. What is the ON resistance of a transistor?

a) R ON = V CEsat /βI B

b) R ON = V CEsat + V A /I Csat

c) R ON = V CEsat /I B

d) R ON = V CEsat /I Csat

Answer: d

Explanation: In the saturation region, we consider that the transistor acts as an ON switch. In this region, both collector-to-emitter voltage as well current are constant and do not change. The ON resistance is the ratio of this saturation voltage to saturation current.

6. For the graph which depicts collector current, find the ON time.

analog-circuits-questions-answers-transistor-switching-network-q6

t 1 = 1ms

t 2 = 2ms

t 3 = 4ms

t 4 = 6ms

t 5 = 16ms

t 6 = 18ms

a) 3ms

b) 1ms

c) 2ms

d) 5ms

Answer: a

Explanation: On time is the time taken by BJT to change from the OFF state to the ON state. It is the sum of the delay time and the rise time. Rise time is the time taken by current to increase from 10% to 90% of saturation and delay time is time taken by current to increase from 0 to 10% of the saturation.

t on = t d + t r = t 2 – t 1 + t 3 – t 2 = 2 – 1 + 4 – 2 = 3ms.

7. Find the storage time for the current variation shown below.

analog-circuits-questions-answers-transistor-switching-network-q6

t 1 = 2ms

t 2 = 3ms

t 3 = 4ms

t 4 = 6ms

t 5 = 19ms

t 6 = 20ms

a) 1ms

b) 13ms

c) 3ms

d) 2ms

Answer: b

Explanation: Storage time is the time taken by I C to decrease from I Csat to 90% of I Csat .

T S = t 5 – t 4 = 19 – 6 = 13ms.

8. Which of these relations is true always for the BJT as a switch?

a) Off time >> On time

b) Off time = Storage time – Rise time

c) Off time << On time

d) Off time = Storage time + Delay time

Answer: a

Explanation: Off time for a BJT is larger than its ON time. Off time=Storage time + Fall time.

Often Storage time is larger than fall/delay/rise time and hence OFF time is quite large than ON time.

9. How is BJT used as a faster switch?

a) By operating it in the saturation and cut-off region

b) By operating it in the active and cut-off region

c) By using it in strong saturation

d) By decreasing its ON resistance

Answer: b

Explanation: If BJT is to act as a switch with negligible power dissipation, then BJT is operated in the cut-off and saturation region, as in the TTL family. When BJT has to be operated as a fast switch, then it is operated in the active and cut-off region, as in the ECL family.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Characteristics of Amplifier”.

1. The state amplifier has no input is not called ______________

a) Zero signal condition

b) Non-signal condition

c) Quiescent condition

d) Empty-signal condition

Answer: d

Explanation: The state at which amplifier has zero input signal is called zero signal condition, Non-signal condition, quiescent condition. There is nothing named empty-signal condition.

2. Which of the following is not considered for quiescent operating point?

a) DC collector-emitter voltage

b) DC collector current

c) DC base current

d) DC input voltage

Answer: d

Explanation: The quiescent point is the operating point of an amplifier where the DC condition of amplifier is constant. For that we have to make sure that DC collector-emitter voltage, DC collector current, DC base current are constant.

3. Which of the following resistor is not involving in biasing the circuit shown below?

analog-circuits-questions-answers-characteristics-amplifier-q2

a) R 1

b) R 2

c) R C

d) R L

Answer: d

Explanation: R 1 , R 2 , R C are, used to bias the circuit while R L is used as a load resistor. R 1 , R 2 are used as a voltage divider. R C is used to control collector current.

4. Which of the following statements is most correct to explain role of biasing circuit in the implementation of a transistor circuit?

a) It is used provide proper voltage to every component in the circuit

b) It is used to ensure maximum power is obtained out of the circuit

c) It is used to provide the quiescent collector current

d) It is used to provide proper and stable functional environment to all quiescent point parameters

Answer: d

Explanation: The basic function of biasing is to maintain amplifier in quiescent condition. The amplifier will properly work only if the quiescent condition is stable.

5. What is the role of input capacitance in the transistor amplifying circuit?

a) To prevent input variation from reaching output

b) To prevent DC content in the input from reaching transistor

c) There isn’t any role for input capacitance

d) To increase input impedance

Answer: b

Explanation: The input capacitance, as its name indicates is used to prevent DC offset voltages in the input. It also prevents the transistor bias voltage to be fed back to input generating circuit.

6. What is the role of emitter bypass capacitance in the transistor amplifying circuit?

a) To prevent damage of emitter resistance from variation in voltage

b) To prevent emitter from over voltage

c) To increase gain

d) To increase load to transistor circuit

Answer: c

Explanation: When an emitter resistance is added to the amplifier circuit, in common emitter mode, voltage gain is reduced and input impedance increases. When we need to obtain higher gain, we add a capacitance in parallel to the emitter resistance, called emitter bypass capacitance, and voltage gain does not decrease.

7. Which of the following is actually not a function of emitter bypass capacitor?

a) Increase gain

b) Lower the impedance of emitter resistance

c) Provide a low reactance path

d) Help emitter resistance to withstand voltage variation

Answer: d

Explanation: The emitter bypass capacitor is not meant for reducing loading effect of emitter resistance. It is to increase gain. It provides a low reactive path to the AC signal without changing the quiescent point.

8. What is the role of emitter resistance in the transistor amplifying circuit?

a) To prevent thermal runaway

b) To prevent increase in gain

c) To lower the output impedance

d) To increase gain

Answer: a

Explanation: Thermal runaway is the increase in the collector current without an increase in input due to heating of semiconductor material which in turn reduce the resistance thus increases current. The emitter resistor decreases effective input voltage decrease when collector current increases and thus it reduces collector current itself.

9. Which of the following is not true regarding the output capacitor in the transistor biasing circuit?

a) To pass AC signal

b) To stop DC signal

c) To couple the amplifier to load or next amplifier

d) There is no importance for an output capacitance

Answer: d

Explanation: The output capacitor or output coupling capacitor is provided to pass AC signal and to block DC signal. It also helps to couple the amplifier to load or next amplifier.

10. Which of the following is the best biasing method for transistor bias?

a) emitter bias

b) voltage divider bias

c) fixed bias

d) collector feedback bias

Answer: b

Explanation: Voltage divider bias is more stable because the biased voltage will not change. It is best to use voltage divider bias for accuracy.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Hybrid Equivalent Model”.

1. Which of the following statement is incorrect?

a) Output of CE amplifier is out of phase with respect to its input

b) CC amplifier is a voltage buffer

c) CB amplifier is a voltage buffer

d) CE amplifier is used as an audio amplifier

Answer: c

Explanation: The output of the CE amplifier has a phase shift of 180 o with respect to the input. The CC amplifier has A V ≅1, thus it is a voltage buffer. However, the CB amplifier has a large voltage gain, and its current gain A I ≅1, thus it is a current buffer. CE amplifier has an application that has an audio amplifier.

2. Consider the following circuit. __________ provides DC isolation. _____________ prevents a decrease in voltage gain. _____________ is used to control the bandwidth.

analog-circuits-questions-answers-hybrid-equivalent-model-q2

a) C3, C1, C4

b) C4, C1, C2

c) C2, C3, C2

d) C4, C3, C2

Answer: b

Explanation: Capacitor C3 and C4, are the blocking capacitor and coupling capacitor respectively, both providing DC isolation to biasing circuit. Capacitor C1 is the emitter bypass capacitor, to prevent decrease in voltage gain by avoiding negative feedback. Capacitor C2 is the shunt capacitor, used to control the bandwidth, wherein the bandwidth is inversely proportional to C2.

3. Given h fe = 60, h ie =1000Ω, h oe = 20μ Ω – , h re = 2 * 10 -4 . Find the current gain of the BJT, correct up to two decimal points.

analog-circuits-questions-answers-hybrid-equivalent-model-q3

a) – 58.44

b) -59.21

c) – 60.10

d) – 60.00

Answer: a

Explanation: Current gain, A I = – h f /(1 + h o R L ’) where R L ’ = 2kΩ||4kΩ

R L ’ = 1.33kΩ.

Thus A I = – 60/ = -58.4453.

4. Consider the circuit. Given h fe = 50, h ie = 1200Ω. Find voltage gain.

analog-circuits-questions-answers-hybrid-equivalent-model-q4

a) – 278

b) -277.9

c) – 300

d) – 280

Answer: a

Explanation: Voltage gain = A V = -h fe R L ’/h ie

R L ’ = 20k||10k = 6.67kΩ

A V = -50 * 6.67k/1.2k = -277.9 ≅ – 278.

5. Given that I B = 5mA and h fe = 55, find load current.

analog-circuits-questions-answers-hybrid-equivalent-model-q5

a) 28mA

b) 280mA

c) 2.5A

d) 2A

Answer: b

Explanation: In given circuit, which is an emitter follower, current gain = 1 + h fe

I L = I B (1+h fe )

I L = 5mA = 280 mA.

6. Consider the following circuit, where source current = 10mA, h fe = 50, h ie = 1100Ω, then for the transistor circuit, find output resistance R O and input resistance R I .

analog-circuits-questions-answers-hybrid-equivalent-model-q6

a) R O = 0, R I = 21Ω

b) R O = ∞, R I = 0Ω

c) R O = ∞, R I = 21Ω

d) R O = 10, R I = 21Ω

Answer: c

Explanation: Since hoe is not given, we can consider it to be small; i.e 1/h oe is neglected, open circuited. Hence output resistance R O = ∞.

Input resistance = h ie /(1 + h fe ) = 1100/51 ≅ 21Ω.

7. For the given circuit, input resistance R I = 20Ω, h fe = 50. Output resistance = ∞. Find the new values of input and output resistance, if a base resistance of 2kΩ is added to the circuit.

analog-circuits-questions-answers-hybrid-equivalent-model-q7

a) R I = 20Ω, R O = ∞

b) R I = 20Ω, R O = 2kΩ

c) R I = 59Ω, R O = ∞

d) R I = 59Ω, R O = 2kΩ

Answer: c

Explanation: R I = 20k = h ie /(1+h fe ) = h ie /51

h ie =1020 Ω

Hence, after adding base resistance, R I ’= (h ie +R B )/(1+h fe ) = /51 ≅ 59Ω

There is no change in output resistance or current gain due to an extra base resistance. R O ’ = ∞.

8. Consider its input resistance to be R1. Now, the bypass capacitor is attached, so that the new input resistance is R2. Given that h ie = 1000Ω and h fe = 50, find R1-R2.

analog-circuits-questions-answers-hybrid-equivalent-model-q8

a) 112.2Ω

b) 0Ω

c) 110Ω

d) 200Ω

Answer: a

Explanation: For the circuit, CE amplifier without bypass capacitor, input resistance, R1=h ie + (1+h fe )R E

R1 = 1000 + 51*2.2 = 1000 + 112.2 = 1112.2Ω

With a bypass capacitor attached, input resistance, R2 = h ie = 1000Ω

Thus R1 – R2 = 112.2Ω.

9. Given that for a transistor, h ie = 1100Ω, h fe = 50, h re = 2*10 -4 and h oe = 2μΩ -1 . Find CB h-parameters.

a) h fb = 1, h ib = 22, h ob = 3μΩ -1 , h rb = -1.5×10 -4

b) h fb = -0.98, h ib = -21.56, h ob = 0.03μΩ -1 , h rb = 1.5×10 -4

c) h fb = -0.98, h ib = 21.56, h ob = 0.03μΩ -1 , h rb = -1.5×10 -4

d) h fb = 1, h ib = -21.56, h ob = 0.03μΩ -1 , h rb = -2×10 -4

Answer: c

Explanation: h fb = -h fe /(1+h fe ) = -50/51 = -0.98

h ib = h ie /(1+h fe ) = 21.56Ω

h ob = h oe /(1+h fe ) = 0.03 μΩ -1

h rb = (h ie h oe /1+h fe ) – h re = -1.5×10 -4 .

10. If source resistance in an amplifier circuit is zero, then voltage gain and source voltage gain are the same.

a) True

b) False

Answer: a

Explanation: When a source resistance R S is present, the voltage gain with respect to source becomes

A VS = A V R I ’/(R S +R I ’), where A V is voltage gain with respect to transistor input. However when R S =0 then A VS = A V .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Collector Feedback Configuration”.

1. The Collector feedback configuration is better than __________

a) Fixed Bias Configuration

b) Voltage divider configuration

c) C.E. configuration

d) C.B. configuration

Answer: a

Explanation: The fixed bias circuit has been seen to offer low stability with respect to change in I CO . The Voltage divider bias provides the most stable biasing mechanism. Hence, the collector feedback configuration is better than the fixed bias configuration while C.E. and C.B. are not biasing stages.

2. The Collector feedback is done by connecting a resistor from the collector to the __________

a) Emitter

b) Base

c) Supply voltage

d) Bias voltage

Answer: b

Explanation: The collector feedback configuration is done by connecting a resistor from the collector to the base voltage. This is done to stabilize the biasing voltage against thermal runaway.

3. The Collector feedback configuration helps to stabilize __________

a) Bias voltage

b) Collector voltage

c) Bias current

d) Collector current

Answer: d

Explanation: The collector feedback configuration is used to stabilize the Collector current. The Collector current is seen to increase at a sincere rate which can harm the transistor by thermal runaway. Stabilizing this current is necessary during biasing a transistor for proper application.

4. The Collector feedback helps to evade __________

a) Inverse Active mode

b) Pinch Off

c) Thermal Runaway

d) Breakdown

Answer: c

Explanation: The increase in the Collector current is primarily due to I CO . A sudden increase in I CO can increase the Collector current and this will increase the temperature of the device. This is called thermal runaway and due to the high current gain of the transistor, the transistor can get destroyed due to thermal runaway. The Collector feedback configuration helps to evade this phenomenon.

5. Due to the Collector feedback mechanism, the transistor remains always remains in the __________

a) Active mode

b) Saturation mode

c) Inverse Active

d) Cut-off

Answer: a

Explanation: The collector feedback configuration helps to keep the transistor in the active region. This is done because the bias voltage can get changed if the input and the bias voltage is superposed. With the introduction of this feedback mechanism, the transistor always stays biased in the active region.

6. What are the effects on the output voltage if the Collector resistance increases in a Collector feedback configuration?

a) Not much effect

b) Bias voltage reduces

c) Bias voltage increases

d) Bias voltage doubles

Answer: a

Explanation: The increase in collector resistance doesn’t have much impact on the output voltage since the bias voltage is kept stable by the feedback operation. After all, one of the important applications of feedback is increasing stability and the output voltage is kept stable by this configuration.

7. What kind of configuration is this?

analog-circuits-questions-answers-collector-feedback-configuration-q7

a) Collector feedback

b) Base Bias

c) Self Bias

d) No bias

Answer: d

Explanation: The transistor isn’t biased since the voltage drop from the base to the collector is 0. The transistor action won’t get be manifested.

8. If the current gain of the transistor is β, what is the stability factor pertaining to I C and I CO ?

analog-circuits-questions-answers-collector-feedback-configuration-q8

a) β+1/{1 + β * R 1 /(R 1 + β)}

b) β+1

c) β+1/{1 + β * R 2 /(R 1 + β)}

d) β+1/{1 + (R 1 + β)}

Answer: a

Explanation: The stability factor is determined by calculating the change in IC with respect to the change in ICO. Hence, we can simply apply the method of K.V.L. and derive a relation between these two currents. After differentiation, we’ll get the stability factor as β+1/{1 + β * R 1 /(R 1 + β)}.

9. To keep the B.J.T. in the active region, what should be the relation between R1 and R2?

analog-circuits-questions-answers-collector-feedback-configuration-q8

a) R1 >> R2

b) R1 << R2

c) R1 = R2

d) No such relation

Answer: b

Explanation: The feedback resistance should be much smaller than the collector resistance since we need to reduce the sensitivity of the collector current to the current gain. Typically, R2 should be lower than R1 by a factor of β.

10. From the base bias to the collector feedback configuration, the stability facto S reduces by a factor of __________

a) 1 + R 1 /(R 1 + β)

b) 1 + β * R 1 /(R 1 + β)

c) β * R 1 /(R 1 + β)

d) R 1 /(R 1 + β)

Answer: b

Explanation: This can be simply observed from the stability factors of both cases. The correct factor is 1 + β * R 1 /(R 1 + β).

11. What is the stability factor against VBE for the collector feedback configuration?

a) β/)

b) -β/)

c) β/)

d) -β/)

Answer: c

Explanation: This is easily derived from the Collector feedback configuration by using the method of K.V.L. deriving a relation between the collector current and the base emitter voltage. It should be noted that the stability against VBE increases in comparison to the base bias comparison.

12. What is the condition of stability of the following circuit?

analog-circuits-questions-answers-collector-feedback-configuration-q12

a) Highly stable

b) Poorly stable

c) Marginally stable

d) Unstable

Answer: b

Explanation: The Collector feedback configuration does make the biasing stable but here, the collector and the base resistances are same. Hence, we conclude that the circuit is poorly stable. The base resistance should be substantially lower than the collector resistance.

13. If β = 100, what should be the ratio of the collector to base resistance for achieving insensitivity to β?

analog-circuits-questions-answers-collector-feedback-configuration-q12

a) 110

b) 90

c) 20

d) 140

Answer: d

Explanation: The Base resistance should be substantially lower than the Collector resistance by a factor of β. 110 is a good choice but provided 140 is present as an option, a better choice is a factor of 140.

14. Why are we worried about β during the Collector feedback configuration?

a) To maintain a stable q-point irrespective of β

b) To increase the gain

c) To decrease the output impedance

d) To maintain a stable input impedance

Answer: a

Explanation: If we change the device, β changes. But we want to keep the q-point stable so that circuit if represented as a black box, would provide the same characteristics and not be highly dependent on the transistor. Hence, we want to make the circuit insensitive to β.

15. The stability factors change from npn to pnp transistor.

a) True

b) False

Answer: b

Explanation: The stability factors are independent of whether the transistor is of npn or pnp type. It is only dependent on β and the impedance connected to the terminals of the transistor of a hyperbola.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “General Frequency Consideration”.

1. The frequency f1 and f2 from the below picture are respectively called ___________

analog-circuits-questions-answers-general-frequency-consideration-q1

a) lower cut-off frequency and upper cut-off frequency

b) upper cut-off frequency and lower cut-off frequency

c) left frequency, right frequency

d) there is no specific name

Answer: a

Explanation: The frequencies are called lower cut-off frequency and upper cut-off frequency. At these frequencies power of the signal becomes half of its original value, 3dB less than the maximum and they are also called 3dB cut-off frequencies.

2. Bandwidth of amplifier is __________

a) Difference between upper cut-off frequency and lower cut-off frequency

b) Sum of upper cut-off frequency and lower cut-off frequency

c) Average of upper cut-off frequency and lower cut-off frequency

d) Independent to cut off frequency

Answer: a

Explanation: 3dB bandwidth of an amplifier is the difference between upper cut-off frequency and lower cut-off frequency. The unity gain bandwidth is the difference between frequencies where gain is 1.

3. At 3dB cut-off frequency the voltage gain will be __________

a) 100% of maximum gain

b) 70.7% of maximum gain

c) 80.7% of maximum gain

d) 47.5% of maximum gain

Answer: b

Explanation: 3dB cut-off frequency is the frequency at which the power becomes half of its maximum value. That is the voltage gain becomes 0.707 times maximum voltage gain.

4. At 3dB cut-off frequencies power will be __________

a) Half of maximum value

b) Quarter of maximum value

c) 70.7% of maximum value

d) Same as maximum value

Answer: a

Explanation: 3dB cut-off frequency is the frequency at which the power becomes half of its maximum value. That is the voltage gain becomes 0.707 times maximum voltage gain. The importance of 3dB points is that for a human ear, it will not notice the fall in power of the signal up to 50% of maximum power.

5. A voltage amplifier has a voltage gain of 100. What will be gain at 3dB cut-off frequencies?

a) 70.7

b) 80.7

c) 45.7

d) 50

Answer: a

Explanation: 3dB cut-off frequency is the frequency at which the power becomes half of its maximum value. That is the voltage gain becomes 0.707 times maximum voltage gain. Therefore if voltage gain is 100 then gain at 3dB frequencies will be

100 x 0.707 = 70.7.

6. What is the roll-off rate of single order filter?

a) 20dB/decade

b) 5dB/octave

c) 40dB/decade

d) 10dB/octave

Answer: a

Explanation: At lower and higher frequencies the gain is decreasing. This fall or decrease in gain is known as roll-off rate. It is commonly specified in dB/octave or dB/decade. For a single order filter, the roll-off rate is 6dB/octave or 20dB/decade.

7. -6dB is equivalent to __________ power gain.

a) 0.5

b) 0.25

c) 0.75

d) 0.8

Answer: b

Explanation: The relation between dB and power gain is

dB = 10 log

That is power gain for -6dB is

10 = 0.251.

8. Voltage gain of 1,00,000 is equivalent to __________

a) 10dB

b) 1000dB

c) 100dB

d) 50dB

Answer: c

Explanation: dB = 20 log

Therefor 100000 voltage gain is equivalent to

20 logdB = 100 dB.

9. If the output power from an audio amplifier is measured at 100W when the signal frequency is 1kHz, and 1W when the signal frequency is 10kHz. Calculate the dB change in power.

a) -10dB

b) -20dB

c) -30dB

d) 15dB

Answer: b

Explanation: The initial power gain in dB = 10 log

= 10 log = 20dB

The final power gain in dB = 10 log

= 10 log = 0 dB

So change in power = final power – initial power

= 0-20 = -20dB.

10. If an electronic system produces a 48mV output voltage when a 12mV signal is applied, calculate the decibel value of the systems output voltage gain.

a) 12dB

b) 6dB

c) 20dB

d) 4dB

Answer: a

Explanation: Gain of the system is = output voltage/input voltage

= 48/12 = 4

Gain in dB = 20 log

= 20 log = 12.04 dB.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Effect of Various Capacitors on Frequency Response – 1”.

1. During high frequency applications of a B.J.T., which parasitic capacitors arise between the base and the emitter?

a) C je and C b

b) C cs

c) C b

d) C cs and C b

Answer: a

Explanation: There are two capacitors that arise between bases and emitter. One is C je due to depletion region associated between base and emitter. C b is another capacitor which arises due to the accumulation of electrons in the base which further results into the concentration gradient within the base of the transistor.

2. During high frequency applications of a B.J.T., which parasitic capacitors arise between the collector and the emitter?

a) No capacitor arises

b) C cs

c) C b

d) C cs and C b

Answer: a

Explanation: The emitter and the collector are far away from each other when the B.J.T. is being constructed. Hence, we find that they don’t share a common junction where charges can accumulate. Thus, no such parasitic capacitors appear.

3. During high frequency applications of a B.J.T, which parasitic capacitors arise between the collector and the base?

a) C je and C b

b) C cs

c) C π

d) C µ

Answer: d

Explanation: Only one capacitor up between the base and the collector. This is due to the depletion region present between the base and the collector region.

4. Which parasitic capacitors are present at the collector terminal of the B.J.T.?

a) C je and C b

b) C cs and C µ

c) C b

d) C cs and C b

Answer: b

Explanation: There are two capacitors attached to the collector terminal. The collector-base junction provides a depletion capacitance (C µ ) while the collector substrate junction provides a certain capacitance (C cs ).

5. Which parasitic capacitors do not affect the frequency response of the C.E. stage, of the B.J.T.?

a) C je and C b

b) C cs and C µ

c) C b and C µ

d) No parasitic capacitor gets deactivated

Answer: d

Explanation: While observing the frequency response of a C.E. stage, we find that all the parasitic capacitances of the B.J.T. end up slowing the speed of the B.J.T. The frequency response of this stage is affected by all the parasitic capacitors.

6. Which parasitic capacitors don’t affect the frequency response of the C.B. stage of the B.J.T.?

a) None of the parasitic capacitances

b) All the parasitic capacitances

c) Some of the coupling capacitors

d) C cs and C b

Answer: b

Explanation: All the parasitic capacitors of a B.J.T. affect the C.B. stage. None of the parasitic capacitors gets deactivated and they end up behaving as a pole during the frequency response of the C.B. stage.

7. Which parasitic capacitors don’t affect the frequency response of the C.C. stage of the B.J.T.?

a) C cs

b) C cs and C b

c) C b

d) C cs and C µ

Answer: a

Explanation: In the follower stage, the load is present at the emitter. The parasitic capacitors present between the collector and the substrate i.e. C µ gets deactivated. This is observed from the small signal analysis where both the terminals of this capacitor get shorted to A.C. ground.

8. If the transconductance of the B.J.T increases, the transit frequency ______

a) Increases

b) Decreases

c) Doesn’t get affected

d) Doubles

Answer: a

Explanation: The transit frequency is directly proportional to the transconductance of the B.J.T. Hence, the correct option is increases. Since it hasn’t been mentioned that whether the transconductance has been doubled or not, we cannot conclude the option “doubles” as an answer.

9. If the total capacitance between the base and the emitter increases by a factor of 2, the transit frequency __________

a) reduces by 2

b) increases by 2

c) reduces by 4

d) increases by 4

Answer: a

Explanation: The transit frequency is almost inversely proportional to the total capacitance between the base and the emitter of the B.J.T. Hence, the transit frequency will approximately reduce by 2 and the correct option becomes reduces by 2.

10. Which effect plays a critical role in producing changes in the frequency response of the B.J.T.?

a) Thevenin’s effect

b) Miller effect

c) Tellegen’s effect

d) Norton’s effect

Answer: a

Explanation: The miller effect results in a change in the capacitance seen between the base and the collector. This is why it affects the frequency response of the B.J.T. deeply by changing the poles and affecting the high frequency voltage gain stage.

11. If a C.E. stage has a load R l and transconductance g m , what is the factor by which the capacitance between the base and the collector at the input side gets multiplied?

a) 1 + g m R l

b) 1 – g m R l

c) 1 + 2*g m R l

d) 1 – 2*g m R l

Answer: a

Explanation: The low frequency gain of the C.E. stage is g m R l . By the application of miller effect, we find that the capacitor between the base and the collector, looking into the input of the C.E. stage, will be increased by a factor of 1 + g m R l .

12. If a C.E. stage has a load R l and transconductance g m , what is the factor by which the capacitance between the base and the collector at the output side gets multiplied?

a) 1 + 1/g m R l

b) 1 – 1/g m R l

c) 1 + 2/g m R l

d) 1 – 2/g m R l

Answer: a

Explanation: The low frequency response of the C.E. stage is g m R l . By the application of miller effect, we find that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g m R l . Hence, the correct option is 1 + 1/g m R l .

13. If a C.E. stage with early effect has a load R l and transconductance g m , what is the factor by which the capacitance between the base and the collector at the output side, gets multiplied?

a) 1 + 2/g m *(R l || ro)

b) 1 – 1/g m *(R l || ro)

c) 1 + 1/g m *(R l || ro)

d) 1 – 2/g m *(R l || ro)

Answer: c

Explanation: If the early effect is considered, the low frequency response of the C.E. stage becomes g m *(R l || ro). Thereby, miller approximation shows that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g m *(R l || ro). Hence the correct option is 1 + 1/ g m *(R l || ro).

14. For a high frequency response of a simple C.E. stage with a transconductance of g m , what is C in ?

a) C µ (1 + g m *R 2 ) – C π

b) C µ (1 + g m *R 2 ) + C π

c) C µ (1 – 2* gm *R 2 ) + C π

d) C µ (1 + 2* gm *R 2 ) – C π

Answer: b

Explanation: The input capacitance is an equivalent of the base to emitter capacitance in parallel to the miller approximation of the base to collector capacitance. Due to miller approximation, the base to collector capacitance becomes C µ (1+g m *R 2 ) while the base to emitter capacitance is C π . Capacitors get added, when in parallel and thus C µ (1+g m *R 2 ) + C π is correct.

15. For a high frequency response of a simple C.E. stage with a transconductance of g m , what is C out ?

a) C cs – C µ *(2 + 1/g m *R 2 )

b) C cs + C µ *(1 + 2/g m *R 2 )

c) C cs – C µ *(1 + 1/g m *R 2 )

d) C cs + C µ *(1 + 1/g m *R 2 )

Answer: d

Explanation: We have a capacitor from the collector to substrate, C cs , which comes in parallel to the miller approximation of the capacitance from base to collector. The miller approximation defines the latter as C µ *(1 + 1/g m *R 2 ). Since capacitors gets added, when in parallel, the correct option is C cs + C µ *(1+ 1/g m *R 2 ).

This set of Analog Circuits Mcqs focuses on “Effect of Various Capacitors on Frequency Response – 2”.

1. Ignoring early effect, if R 1 is the total resistance connected to the base and R 2 is the total resistance connected at the collector, what could be the approximate input pole of a simple C.E. stage?

a) 1 / [R 1 * (C µ (2+g m *R 2 ) + C π )]

b) 1 / [R 1 * (C µ (1+2*g m *R 2 ) + C π )]

c) 1 / [R 1 * (C µ (1+g m *R 2 ) + C π )]

d) 1 / [R 1 * (C µ (1-g m *R 2 ) + C π )]

Answer: c

Explanation: The input pole can be approximately calculated by observing the input node. The input node is the node where the base of the B.J.T. is connected to the input voltage. The product of total resistance and capacitance connected at that particular node is R 1 * C in and C in is C µ (1+g m *R 2 ) + C π- the inverse of this product gives us the input pole. Thus the correct option is 1 / [R 1 * (C µ (1+g m *R 2 ) + C π )].

2. Ignoring early effect, if R 2 is the total resistance at the collector, what could be the approximate output pole of a simple C.E. stage?

a) 1 / [R 2 * (C cs + C µ *(1 + 2/g m *R 2 ))]

b) 1 / [R 2 * (C cs – C µ *(1 + 1/g m *R 2 ))]

c) 1 / [R 2 * (C cs + C µ *(1 – 1/g m *R 2 ))]

d) 1 / [R 2 * (C cs + C µ *(1 + 1/g m *R 2 ))]

Answer: d

Explanation: The output pole can be approximately calculated by observing the output node. For a C.E. stage, the output node is the node where the Collector of the B.J.T. is connected to the output measuring device. The product of total resistance and capacitance connected at that particular node is R 2 * C out and C out is (C cs + C µ *(1 + 1/g m *R 2 ). The inverse of this product gives us the output pole. Thus the correct option is 1 / [R 2 * (C cs + C µ *(1 + 1/g m *R 2 ))].

3. If the load resistance of a C.E. stage increases by a factor of 2, what happens to the high frequency response?

a) The 3 db roll off occurs faster

b) The 3 db roll off occurs later

c) The input pole shifts towards origin

d) The input pole becomes infinite

Answer: a

Explanation: If the load resistance increases by a factor of 2, the output pole decreases since it’s inversely proportional to the load resistance. Hence the C.E. stage experiences a faster roll off due to the pole.

4. During high frequency applications of a B.J.T., which of the following three stages do not get affected by Miller’s approximation?

a) C.E.

b) C.B.

c) C.C.

d) Follower

Answer: b

Explanation: During the C.B. stage, the capacitance between the base and the collector doesn’t suffer from Miller approximation since the input is applied to the emitter of the B.J.T. There are no capacitors connected between two nodes having a constant gain. Hence the C.B. stage doesn’t get affected by miller approximation.

5. Ignoring early effect, if C 1 is the total capacitance tied to the emitter, what is the input pole of a simple C.B. stage?

a) 1/g m * C 1

b) 2/g m * C 1

c) g m * C 1

d) g m * 2C 1

Answer: a

Explanation: The resistance looking into the emitter of the B.J.T. is 1/g m . The capacitance connected to the input node is C 1 . The inverse product of these two provides us the input pole of the C.B. stage.

6. Ignoring early effect, if R 1 is the total resistance connected to the collector; what is the output pole of a simple C.B. stage?

a) 1/[R 1 * (C cs + C µ )]

b) 1/[R 1 * (C cs + 2*C µ )]

c) 1/[R 1 * (2*C cs + C µ )]

d) 1/[R 1 * 2*(C cs + C µ )]

Answer: a

Explanation: The output pole is calculated, approximately, by the inverse product of the total resistance and the capacitance connected at the output node. We find that the total resistance connected to the output node is R 1 while the total capacitance is C cs + C µ . In absence of early effect, 1/[R 1 * (C cs + C µ )] becomes the output pole.

7. If early effect is included, and R 1 is the total resistance connected at the collector. What is the output pole of a simple C.B. stage?

a) 1/[(R 1 || ro) * 2(C cs + C µ )]

b) 1/[(R 1 || ro) * (C cs + C µ )]

c) 1/[(R 1 || ro) * (2*C cs + C µ )]

d) 1/[(R 1 || ro) * 2*(C cs + 2*C µ )]

Answer: b

Explanation: The output pole is calculated, approximately, by the inverse product of the total resistance and the capacitance connected at the output node. We find that the total resistance connected to the output node is R 1 in parallel with ro, due to early effect, while the total capacitance is C 2 ie C cs + C µ . Thus, the correct option is 1/[(R 1 || ro) * (C cs + C µ )].

8. In a simple follower stage, C 2 is a parasitic capacitance arising due to the depletion region between the collector and the substrate. What is the value of C 2 ?

a) 0

b) Infinite

c) C cs

d) 2*C cs

Answer: a

Explanation: During the high frequency response, the capacitor between the collector and the substrate gets shorted to A.C. ground at both of its terminals. Hence, C 2 =0. The answer would have been C cs for any other stage of B.J.T.

9. For a cascode stage, with input applied to the C.B. stage, the input capacitance gets multiplied by a factor of ____

a) 0

b) 1

c) 3

d) 2

Answer: d

Explanation: The small signal gain, of the C.B. stage, in a cascode stage is approximately equal to the ratio of the transconductances of the two B.J.T.’s. Since they are roughly same, the gain is 1. Miller multiplication leads to multiplying the capacitance, between base and collector, by a factor of which is 2. Hence, the correct option is 2.

10. If the B.J.T. is used as a follower, which capacitor experiences Miller multiplication?

a) C π

b) C µ

c) C cs

d) C b

Answer: a

Explanation: We find that the input is given to the base of the B.J.T. while the output is sensed at the collector of the B.J.T. We observe that the only capacitance connected between two nodes- where there is an amplification unit between the nodes, is C π . Hence, the correct option is C π .

11. If 1/h 12 = 10 for a C.E. stage, what is the value of the base to collector capacitance, after Miller multiplication, at the output side?

a) 1.1C µ

b) 1.2C µ

c) 2.1C µ

d) 2.2C µ

Answer: a

Explanation: At the output side of a C.E. stage, C µ gets multiplied by a factor of (1+1/A v ) where A v is the voltage gain. 1/h 12 is nothing but A v . Hence, the value changes to 1.1C µ .

12. If 1/h 12 = 4, for a C.E. stage- what is the value of the base to collector capacitance, after Miller multiplication, at the input side?

a) 4C µ

b) 5C µ

c) 6C µ

d) 1.1C µ

Answer: c

Explanation: The capacitor, C µ , gets multiplied by a factor of (1 + A v ), at the input side of a C.E. stage. 1/h 12 is equal to A v since h 12 is the reverse voltage amplification factor. Hence, the final value becomes 5C µ .

13. The transconductance of a B.J.T.is 5mS (g m ) while a 2KΩ (R l ) load resistance is connected to the C.E. stage. Neglecting the Early effect, what is the Miller multiplication factor for the input side?

a) 21

b) 11

c) 20

d) 0

Answer: b

Explanation: The Miller multiplication factor for the input side of a C.E. stage is (1+A v ). Now, Av is the small signal low frequency gain of the C.E. stage which is g m *R L =10. Hence, the Miller multiplication factor is 11.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Low Frequency Response and Miller Effect Capacitance”.

1. In Miller’s theorem, what is the constant K?

a) Total voltage gain

b) Internal voltage gain

c) Internal current gain

d) Internal power gain

Answer: b

Explanation: The constant K=V 2 /V 1 , which is the internal voltage gain of the network.

Thus resistance R M =R/1-K

R N =R/1-K -1 .

2. When applying miller’s theorem to resistors, resistance R1 is for node 1 and R2 for node 2. If R1>R2, then for same circuit, then for capacitance for which the theorem is applied, which will be larger, C1 or C2?

a) C1

b) C2

c) Both are equal

d) Insufficient data

Answer: a

Explanation: Given R1>R2

R/1-K > R/1-K -1 , and so 1-K -1 >1-K

Thus K 2 >1, K>1, K<-1

Thus, C1=C and C2=C(1-K -1 )

Hence C1>C2.

3. Find net voltage gain, given h fe = 50 and h ie = 1kΩ.

analog-circuits-questions-answers-low-frequency-miller-effect-capacitance-q3

a) 27.68

b) -22

c) 30.55

d) -27.68

Answer: d

Explanation: Apply millers theorem to resistance between input and output.

At input, R M =100k/1-K = R I

Output, R N =100k/1-K -1 ≈ 100k

Internal voltage gain , K = -h fe R L ’/h ie

K = – 50xR c ||100k/1k = – 50x4x100/104 = – 192

R I = 100k/1+192 = 0.51kΩ

R I ’ = R I ||h ie = 0.51k||1k = 0.51×1/1.51 = 0.337kΩ

Net voltage gain = K.R I ’/R S +R I ’ = – 192 x 0.337/2k + 0.337k = -27.68.

4. Given that capacitance w.r.t the input node is 2pF and output node is 4pF, find capacitance between input and output node.

a) 0.67 pF

b) 1.34pF

c) 0.44pF

d) 2.2pF

Answer: a

Explanation: C1=C, C2=C(1-K -1 )

C1=2pF

C2=4pF

C1/C2=1/2=1-K/1-K-1

K = -2

C1 = C = 3C

C = C1/3 = 2/3pF = 0.67 pF.

5. Consider an RC coupled amplifier at low frequency. Internal voltage gain is -120. Find the voltage gain magnitude, when given that collector resistance = 1kΩ, load = 9kΩ, collector capacitance is 0. is 0.1μF, and input frequency is 20Hz.

a) 120

b) 12

c) 15

d) -12

Answer: c

Explanation: A V = -120

f L = 1/2πC C (R C +R L ) = 1/2π*0.001 = 1000/2π = 159.15Hz

A V ’ = \

^2\)

A V ’ = 120/8.02 ≈ 15.

6. Find the 3-dB frequency given that the gain of RC coupled amplifier is 150, the low frequency voltage gain is 100 and the input frequency is 50Hz.

a) 50.8 Hz

b) 55.9 Hz

c) 60Hz

d) 100Hz

Answer: b

Explanation: A VM = 150

A VL = 100

f = 50Hz

100 = \

^2\)

1+f 2 /2500 = 1.5 2

f 2 = 2500*1.25 = 3125

f = 55.90 Hz.

7. Given collector resistance = 2kΩ, load resistance = 5kΩ, collector capacitance = 1μF, emitter capacitance = 20μF, collector current = 2mA, source resistance = 2kΩ. If the effect of blocking capacitor is ignored, find the applicable cut-off frequency.

a) 22.73 Hz

b) 612 Hz

c) 673Hz

d) 317 Hz

Answer: b

Explanation: R C = 2kΩ, R L = 5kΩ, C C = 1μF, C B = 10μF, C E = 20μF, R S = 2 kΩ

h ie = 1kΩ, I C = 2mA

f L1 = 1/2πC C (R C +R L ) = 22.73 Hz

f L2 = g m /2πC E = I C /2πC E V T = 612 Hz

Since f L2 > 4f L1 , hence f L2 is the correct answer.

8. Consider the circuit shown.

analog-circuits-questions-answers-low-frequency-miller-effect-capacitance-q8

h fe = 50, h ie = 1000Ω. Find magnitude of voltage gain at input frequency 10Hz.

a) 100

b) 133

c) 166

d) 220

Answer: b

Explanation: Net load = 10k||10k = 5kΩ = R L ’

A VM = -h fe R L ’/h ie = -50×5/1 = -250

f L = 1/2πC C (R C +R L ) = 15.9 Hz

A VL = \

^2\) = 133.

9. What is the phase shift in RC coupled CE amplifier at lower 3dB frequency?

a) 180°

b) 225°

c) 270°

d) 100°

Answer: b

Explanation: Total phase shift = 180°+ tan -1 (f L /f)

At 3dB frequency f L /f = 1

Total phase shift = 180° + 45° = 225°.

10. Consider that the phase shift of an RC coupled CE amplifier is 260°. Find the low frequency gain when the voltage gain of the transistor is -150.

a) 100

b) 26

c) 40

d) 55

Answer: b

Explanation: 180° + tan -1 (f L /f) = 260°

f L /f = tan = 5.67

A = \(\frac{150}{\sqrt{1}}\) + 5.672 = 26.05.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “High Frequency Response”.

1. We cannot use h-parameter model in high frequency analysis because ____________

a) They all can be ignored for high frequencies

b) Junction capacitances are not included in it

c) Junction capacitances have to be included in it

d) AC analysis is difficult for high frequency using it

Answer: b

Explanation: The effect of smaller capacitors is considerable in high frequency analysis of analog circuits, and hence they cannot be ignored. Instead of h-parameter model, we use π-model.

2. Consider a CE circuit, where trans-conductance is 50mΩ -1 , diffusion capacitance is 100 pF, transition capacitance is 3 pF. I B = 20μA. Given base emitter dynamic resistance, r be = 1000 Ω, input V I is 20*sin(10 7 t). What is the short circuit current gain?

a) 30

b) 35

c) 40

d) 100

Answer: b

Explanation: A I = I L /I B

I L = -g m V b’e

V b’e = I b r b’e /(1+jωCr b’e )

C = C D + C T = 103pF

V b’e = 20μ.1k/(1+j.10 7 .103.10 -12 .1000)

A I = I L /I B = 50m.1k/(1+j.10 7 .103.10 -12 .1000)

A I = 35 .

3. Given that transition capacitance is 5 pico F and diffusion capacitance is 80 pico F, and base emitter dynamic resistance is 1500 Ω, find the β cut-off frequency.

a) 7.8 x 10 6 rad/s

b) 8.0 x 10 6 rad/s

c) 49.2 x 10 6 rad/s

d) 22.7 x 10 6 rad/s

Answer: a

Explanation: The frequency in radians is calculated by

ω β = 1/C.r be

ω β = 7.8 x 10 6 .

4. For given BJT, β=200. The applied input frequency is 20 Mhz and net internal capacitance is 100 pF. What is the CE short circuit current gain at β cut-off frequency?

a) 200

b) 100

c) 141.42

d) 440.2

Answer: c

Explanation: The current gain for the CE circuit is A = \(\frac{β}{\sqrt{1+

^2}}\)

At f = f β , A = \(\frac{β}{\sqrt{2}}\)

Hence A = 141.42.

5. Given that β=200, input frequency is f = 20Mhz and short circuit current gain is A = 100. What is the unity gain frequency?

a) 2308 Mhz

b) 2000 Mhz

c) 2508 Mhz

d) 3000 Mhz

Answer: a

Explanation: A = \

2 = 4

20/f = 1.732

f β = 11.54 Mhz

Unity gain frequency = βf β = 200 x 11.54Mhz = 2308 Mhz.

6. Gain bandwidth frequency is GBP= 3000 Mhz. The cut-off frequency is f=10Mhz. What is the CE short circuit current gain at the β cutoff frequency?

a) 212

b) 220

c) 300

d) 200

Answer: a

Explanation: f T = 3000Mhz

βf β = 3000Mhz

β = 3000/10 = 300

A = \(\frac{β}{\sqrt{2}}\) = 212.13.

7. Which of the statement is incorrect?

a) At unity gain frequency the CE short circuit current gain becomes 1

b) Unity gain frequency is the same as Gain Bandwidth Product of BJT

c) Gain of BJT decreases at higher frequencies due to junction capacitances

d) β- cut-off frequency is one where the CE short circuit current gain becomes β/2

Answer: d

Explanation: At unity gain frequency the current gain is 1 is a correct statement. The same frequency is f T = βf β which is the gain bandwidth product of BJT. Gain of BJT at high frequency decreases due to the junction capacitance. However, at β cut-off frequency, current gain becomes \(\frac{β}{\sqrt{2}}\).

8. Given a MOSFET where gate to source capacitance is 300 pF and gate to drain capacitance is 500 pF. Calculate the gain bandwidth product if the transconductance is 30 mΩ -1 .

a) 5.98 Mhz

b) 4.9 Mhz

c) 6.5Mhz

d) 5.22Mhz

Answer: a

Explanation: Gain bandwidth product for any MOSFET is f T = g m /2π(C gs +C gd )

Thus GBP is approximately 5.9 Mhz.

9. In an RC coupled CE amplifier, when the input frequency increases, which of these are incorrect?

a) Reactance C SH decreases

b) Voltage gain increases

c) Voltage gain decreases due to shunt capacitance

d) An RC coupled amplifier behaves like a low pass filter

Answer: b

Explanation: When frequency increases, shunt reactance decreases. The voltage drop across shunt capacitance decreases and net voltage gain decrease. RC coupled amplifier acts as a low pass filter at high frequencies.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Cascaded Amplifier”.

1. For any cascaded amplifier network, which of these are incorrect?

a) Cascading increases gain

b) Overall input resistance is equal to the input resistance of the first amplifier

c) The overall output resistance is less than the lowest output resistance in all amplifiers used

d) Loading effect occurs

Answer: c

Explanation: In cascading, the output of one amplifier is connected to the input of another amplifier. It is used to increase gain while obtaining desired values of input and output resistances. Overall input resistance is the same as input resistance of the first amplifier and net output resistance is the same as output resistance of the last (n th ) amplifier in the network. When amplifiers are connected in cascade, then loading effect does occur.

2. Consider the circuit.

analog-circuits-questions-answers-cascaded-amplifier-q2

Loading effect occurs when ______________

a) R2 is small

b) A1 is small

c) R2 is large

d) A2 is large

Answer: a

Explanation: Loading effect refers to the effect of the input resistance of the n th amplifier in the net load resistance of the n-1 th amplifier. The decrease of voltage gain of A1 above, due to smaller input resistance R2 of A2 is called loading effect. If the amplifier has larger input resistance, that is if R2 is large, no loading effect occurs. Such amplifiers are called non-interacting amplifiers.

3. Consider the circuit shown.

analog-circuits-questions-answers-cascaded-amplifier-q3

Find internal voltage gain of the network given g m = 50mΩ -1 and β = 100.

a) 100

b) -90

c) 90

d) 95

Answer: c

Explanation: Both are CE amplifiers without a bypass capacitor.

For this, voltage gain is A V = -g m R L ’/1+g m R E

A2 = -50 x 5/1 + 50 x 0.2 = -22.7

R L1 = 5k||R I2

R I2 = r π + R E = 100/50m + 101 x 0.2k = 2k + 20.2k = 22.2k

R L1 = 4.08kΩ

A1 = -50×4.08/1+ 50×1 = – 4

Gain = A’ = A1 x A2 = 90.8.

4. Cascading increases lower cut-off frequencies.

a) True

b) False

Answer: a

Explanation: Considering each amplifier has lower cut-off frequency f L1 then net lower cut-off frequency for a network of N cascaded amplifiers is f L = \(\frac{f_{L1}}{\sqrt{2^{1/N}}-1}\)

For N>=2, \(\sqrt{2^{1/N}}-1\) < 1, thus f L > f L1 .

5. 6 similar amplifiers are cascaded, with lower cut-off frequency 100Hz. Bandwidth is B1=10 kHz. What is the higher cut-off frequency of the cascaded network?

a) 4000 Hz

b) 1667 Hz

c) 3642 Hz

d) 3000 Hz

Answer: c

Explanation: f L1 = 50 Hz

f L = 50/ \(\sqrt{2^{1/6}}-1\) = 142 Hz

B1 = 10kHz

B2 = B1 \(\sqrt{2^{1/N}}-1\) = 3.5 Khz

f H – f L = 3500

f H = 3642 Hz.

6. It is provided that the lower cut-off frequency of an individual amplifier is 25Hz, find the net cut-off frequency of a cascaded network of 8 similar amplifiers.

a) 200 Hz

b) 83 Hz

c) 100 Hz

d) 25 Hz

Answer: b

Explanation: f L1 = 25Hz

f L = \(\frac{f_{L1}}{\sqrt{2^{1/N}}-1} = \frac{25}{\sqrt{2^{1/8}} -1} = \frac{25}{\sqrt{0.0905}}\)

f L = 83 Hz.

7. Given that the higher cut-off frequency of the cascaded network of 6 amplifiers is 2Mhz, find the higher cut-off frequency of one amplifier, if all amplifiers are similar.

a) 5.7 Mhz

b) 0.33 Mhz

c) 12 Mhz

d) 64 Mhz

Answer: a

Explanation: f H = 2Mhz

f H = f H1 \(\sqrt{2^{1/N}}-1\)

f H1 = 2Mhz/√\(\sqrt{2^{1/6}}-1\) = 5.71 Mhz.

8. The lower and upper cutoff frequencies of an amplifier are unknown. If originally, individual BW of such an amplifier is B1, and now the bandwidth of the cascaded network of 10 such amplifiers is B2, find B2/B1.

a) 0.26

b) 3.84

c) Insufficient data

d) 5

Answer: a

Explanation: To calculate net bandwidth B2 = B1 x \(\sqrt{2^{1/N}}-1\)

B2/B1 = \(\sqrt{2^{1/N}}-1\)

B2/B1 = 0.26.

9. Provided a cascade multistage amplifier network, their pole frequencies obtained are f1=10Mhz, f2=12Mhz, f3=20Mhz, f4=16Mhz. What is the approximate higher cutoff frequency of the cascaded network?

a) 3.4 Mhz

b) 8 Mhz

c) 5 Mhz

d) 6 Mhz

Answer: a

Explanation: The net frequency

1/f H = 1/f1 + 1/f2 + 1/f3 + 1/f4 and so on for multiple stages.

1/f H = 0.295833

f H ≈ 3.4 Mhz.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Cascade and Darlington Amplifier”.

1. Which of these are incorrect about Darlington amplifier?

a) It has a high input resistance

b) The output resistance is low

c) It has a unity voltage gain

d) It is a current buffer

Answer: d

Explanation: A Darlington amplifier has a very high input resistance, low output resistance, unity voltage gain and a high current gain. It is a voltage buffer, not a current buffer.

2. Consider the circuit shown below where h fe =50.

analog-circuits-questions-answers-cascode-darlington-amplifier-q2

Calculate the input resistance of the network.

a) 255 kΩ

b) 13 MΩ

c) 5 MΩ

d) 250 kΩ

Answer: b

Explanation: The load for the first transistor in the figure is the input resistance of the second.

R E1 = (1+h fe )5k = 255kΩ

Net input resistance, R I = (1+h fe )R E1 = 2 5k = 13005k = 13MΩ.

3. Given the following circuit.

analog-circuits-questions-answers-cascode-darlington-amplifier-q3

It is given that h fe =55, h ie =1kΩ, h oe =25μΩ -1 . Calculate the net current gain and the voltage gain of the network.

a) A I =192.6, A v =220

b) A I =1, A V =220

c) A I =192.6, A V =1

d) A I =192.6, A V =55

Answer: c

Explanation: A I =A1xA2

A I = [1+h fe /1+h oe h fe R E ]x[1+h fe ].

A I = 51×51/(1+25x50x10x10 -3 ) = 192.6.

4. In a Darlington pair, the overall β=15000.β1=100. Calculate the collector current for Q2 given base current for Q1 is 20 μA.

analog-circuits-questions-answers-cascode-darlington-amplifier-q4

a) 300 mA

b) 298 mA

c) 2 mA

d) 200mA

Answer: b

Explanation: I B = 20 μA

I C = β.I B = 15000 x 20μ = 300 mA

I C1 = β1.I B = 100.20μ = 2mA

I C2 = 300 – 2 = 298mA.

5. Darlington amplifier is an emitter follower.

a) True

b) False

Answer: a

Explanation: Darlington pair is an emitter follower circuit, in which a darling pair is used in place of a single

transistor. It also provides a large β as per requirements.

6. What is the need for bootstrap biasing?

a) To prevent a decrease in the gain of network

b) To prevent an increase in the input resistance due to the biasing network

c) To prevent a decrease in the input resistance due to the presence of multiple BJT amplifiers

d) To prevent a decrease in the input resistance due to the biasing network

Answer: b

Explanation: A bootstrap biasing network is a special biasing circuit used in the Darlington amplifier to prevent the decrease in input resistance due to the biasing network being used. Capacitors and resistors are added to the circuit to prevent it from happening.

7. Consider a Darlington amplifier. In the self bias network, the biasing resistances are 220kΩ and 400 kΩ. What can be the correct value of input resistance if h fe = 50 and emitter resistance = 10kΩ.

a) 141 kΩ

b) 15 MΩ

c) 20 MΩ

d) 200 kΩ

Answer: a

Explanation: R’ = 220k||400k = 142 kΩ

R I = (1+h fe ) 2 R E = 26MΩ

R I ’ = 26M||142k = 141.22 K.

8. What is a cascade amplifier?

a) A cascade of two CE amplifiers

b) A cascade of two CB amplifiers

c) A cascade of CE and CB amplifiers

d) A cascade of CB and CC amplifiers

Answer: c

Explanation: A cascade amplifier is a cascade network of CE and CB amplifiers, or CS and CG amplifiers.

It is used as a wide-band amplifier.

9. Consider the figure shown.

analog-circuits-questions-answers-cascode-darlington-amplifier-q9

Given that g m1 = 30mΩ -1 and g m2 = 50mΩ -1 , α 1 = 1.1, α 2 = 1.5 what is the transconductance of the entire network?

a) 80 mΩ -1

b) 75 mΩ -1

c) 33 mΩ -1

d) 55 mΩ -1

Answer: d

Explanation: The above circuit is a cascade pair. For this circuit, the overall transconductance is

g m = α 1 g m2

g m = 1.1 g m2 = 55mΩ -1 .

10. Find the transconductance of the network given below, provided that g m1 = 30mΩ -1 . V T = 25mV, V Bias > 4V.

analog-circuits-questions-answers-cascode-darlington-amplifier-q10

a) 30mΩ -1

b) 10mΩ -1

c) 1mΩ -1

d) 20mΩ -1

Answer: a

Explanation: For a MOSFET cascode amplifier, the net transconductance in the above network shown is equal to the transconductance of MOSFET M1 that is equal to 30mΩ -1 .

11. In the given circuit, h fe = 50 and h ie = 1000Ω, find overall input and output resistance.

analog-circuits-questions-answers-cascode-darlington-amplifier-q11

a) R I =956Ω, R O =1.6 kΩ

b) R I =956 kΩ, R O =2 kΩ

c) R I =956 Ω, R O =2 kΩ

d) R I =900Ω, R O =10 kΩ

Answer: c

Explanation: R O = R C = 2kΩ

Input resistance = h ie ||50k||40k = 0.956 kΩ.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Feedback Connection Types”.

1. Which of these doesn’t refer to a series-shunt feedback?

a) Voltage in and Voltage out

b) Current in and Voltage out

c) Voltage Controlled Voltage Source

d) Series voltage feedback

Answer: b

Explanation: In a series shunt feedback network, feedback is connected in series with signal source but in shunt with the load. Error voltage from feedback network is in series with the input. Voltage fed back from output is proportional to output voltage, hence parallel or shunt connected. The current in and voltage out connection refers to a shunt-shunt connection.

2. In the following diagram, shaded portions are named A and B.

analog-circuits-questions-answers-feedback-connection-types-q2

What are A and B?

a) A = Current sampling network, B = Voltage sampling network

b) A = Current mixing network, B = Voltage sampling network

c) A = Shunt mixing network, B = Current sampling network

d) A = Voltage mixing network, B = Current sampling network

Answer: c

Explanation: When feedback network is in shunt with load, then output voltage appears as input to feedback. In above case, output current appears as the feedback input, hence B is a current sampling network. Also, feedback network is in shunt with the signal source, hence it’s called shunt mixing or current mixing.

3. Given that a feedback network is shunt-series, and output load is 10kΩ, what is the output voltage across it given that transfer gain is 10, source current is 20mA and feedback current is 10mA?

a) 1V

b) 2V

c) 10V

d) 20V

Answer: c

Explanation: R L = 10kΩ

I F = βI L

I L = I F /β = 10/10 = 1mA

V L = I L R L = 10V.

4. Consider the circuit shown.

analog-circuits-questions-answers-feedback-connection-types-q4

What is the type of sampling observed?

a) Shunt-Series feedback

b) Series-Series feedback

c) Shunt-Shunt feedback

d) Series-Shunt feedback

Answer: d

Explanation: The feedback network is connected directly to output node, so voltage sampling occurs. However, it’s not connected directly to the input node. Hence it’s series mixing at the input. Voltage sampling is a shunt network.

5. Consider a voltage series feedback network, where amplifier gain = 100, feedback factor = 5. For the basic amplifier, input voltage = 4V, input current=2mA. Find the input resistance of the network.

a) 1.002kΩ

b) 1002kΩ

c) 2kΩ

d) 2000kΩ

Answer: b

Explanation: R I = V I /I I = 4/2m = 2kΩ

R IF = R I = 2k = 1002kΩ.

6. In which network is the unit of the feedback factor Ω?

a) Shunt-shunt feedback

b) Shunt-series feedback

c) Series-series feedback

d) Series-shunt feedback

Answer: c

Explanation: In series-series feedback, the output is current sampled, that is it is in series with the load. Also, input is a voltage mixer, which is in series with signal source. So feedback factor

Β = V F /I L in Ohms.

7. A circuit can have more than one type of feedback.

a) True

b) False

Answer: a

Explanation: In any circuit, the feedback depends on the configuration of resistor network and presence of capacitances. Consider a collector to base bias circuit, in which base resistance causes voltage shunt feedback. However, presence of an emitter resistance provides a second feedback of current series type.

8. Consider given circuit.

analog-circuits-questions-answers-feedback-connection-types-q8

What is the feedback configuration?

a) Current series feedback

b) Current shunt feedback

c) Voltage series feedback

d) Voltage shunt feedback

Answer: a

Explanation: The resistance R4 is the feedback network resistance. There is no bypass capacitor being used. The resistance is not directly connected to either the input node or output node. Hence it’s a current series feedback.

9. Consider the circuit shown below.

analog-circuits-questions-answers-feedback-connection-types-q9

Consider A: Current-shunt feedback

B: Current-series feedback

C: Voltage-shunt feedback

D: Voltage-series feedback

Which of the above are present?

a) A and B

b) A only

c) B only

d) A and D

Answer: a

Explanation: Resistor R5 causes global feedback. It is connected to the input node, causing shunt mixing but not to output node, meaning current sampling. Hence it’s a current shunt feedback. Resistors R6 and R7 are neither connected to input nor the output, causing series mixing and current sampling, hence causing current series feedback.

10. In a feedback network, input voltage is 14V, feedback voltage is 6V and source voltage is 20V. β is in ohms. What is its configuration?

a) Shunt-Shunt feedback

b) Shunt-Series feedback

c) Series-Series feedback

d) Series-Shunt feedback

Answer: c

Explanation: Given that input is 14V, feedback is 6V and source is 20 V, we can see

V I = V S – V F , which is voltage mixing. Also, β is in ohms that is voltage/current. Since output of feedback is voltage and input is current, the output has current sampling. Thus, configuration is a series-series feedback/current – series feedback.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Effects of Feedback”.

1. What is the reverse transmission factor?

a) Ratio of output by input signal

b) Ratio of feedback by input signal

c) Ration of feedback by output signal

d) Ratio of input by feedback signal

Answer: c

Explanation: In feedback systems, the feedback signal is in proportion with the output signal.

X F ∝ X O

X F = βX O , where β is the feedback factor or reverse transmission factor.

2. Return ratio for a circuit is 220. What is the amount of feedback, correct up to 2 decimal places?

a) 2.34 dB

b) – 46.84 dB

c) – 46.88 dB

d) 46.88 dB

Answer: c

Explanation: Return ratio is Aβ, where β=feedback factor, and A=open loop gain.

Amount of feedback is A F /A = 1 + Aβ

In decibels, amount of feedback = -20log 10 = -20log 10 = -46.88 decibels.

3. Consider the given diagram. Loop gain is 19. Consider closed loop gain is 50. Find the output without any feedback when input is 5.

analog-circuits-questions-answers-effects-feedback-q3

a) 1000

b) 500

c) 5000

d) 50000

Answer: c

Explanation: Feedback factor, β=10.

A F = A/ = 50

A = 20*50 = 1000

Output is thus 5000.

4. Consider an open loop circuit with lower cutoff frequency 5kHz and upper cutoff frequency 20kHz. If negative feedback is applied to the same, choose correct option stating the new cutoff frequencies.

a) Lower cutoff = 5kHz, Upper cutoff = 20kHz

b) Lower cutoff = 2kHz, Upper cutoff = 18kHz

c) Lower cutoff = 2kHz, Upper cutoff = 25kHz

d) Lower cutoff = 10kHz, Upper cutoff = 25kHz

Answer: c

Explanation: Negative feedback decreases lower cutoff frequencies and increases the higher cutoff frequency.

f HF = f H

f LF = f L /

Total bandwidth is thus increased.

5. Find the relative change in gain with negative feedback given that return ratio is 24, and feedback factor is 3, when the change in open loop gain is 2.

a) 1

b) 1.6

c) 0.1

d) 0.01

Answer: d

Explanation: A F = A/

Aβ = 24

A = 8

Relative change in gain = dA F /A F = dA/A

dA F /A F = 2/8*25 = 0.01.

6. Relative change of gain of feedback amplifier is 0.05. Also, loop gain is 9. Find desensitivity?

a) 50

b) 10

c) 20

d) 1/9

Answer: b

Explanation: We can simply use the ratio of 0.1 to find the answer.

Loop gain Aβ = 9

1+Aβ = 10

Desensitivity = 1/S = 1+Aβ = 10.

7. Circuit P has desensitivity 20, circuit Q has sensitivity 0.1 and circuit R has desensitivity 40. Which of the following is more stable in gain?

a) Circuit P

b) Circuit Q

c) Circuit R

d) All circuits are equally stable in gain

Answer: c

Explanation: Greater desensitivity indicates better stability in gain. More desensitivity means gain becomes smaller, but stable.

For circuit Q, desensitivity = 1/S = 10

Circuit R has higher desensitivity, hence most stable.

8. Consider the open loop response. An unknown feedback is applied. Choose the correct output of the new system from the following.

analog-circuits-questions-answers-effects-feedback-q8

a) Output response of Increased frequency distortion

analog-circuits-questions-answers-effects-feedback-q8a

b) Output response of Decreased frequency distortion

analog-circuits-questions-answers-effects-feedback-q8b

c) Output response of Decreased frequency distortion

analog-circuits-questions-answers-effects-feedback-q8c

d) Output response of No change in frequency distortion.

analog-circuits-questions-answers-effects-feedback-q8d

Answer: b

Explanation: Output should have increased Bandwidth and decreased frequency distortion. If bandwidth increases, the distortion cannot increase since it’s a case of negative feedback. Also, the distortion cannot remain the same.

9. Consider the total harmonic distortion of a closed loop system is 5%. Distortion without feedback is 10%. Calculate the sensitivity of closed loop system.

a) 0.5

b) 0.2

c) 0.6

d) 0.1

Answer: a

Explanation: D HF = D H /1+Aβ

1 + Aβ = D H /D HF = 10/5 = 2

Sensitivity = \(\frac{1}{2}\) = 0.5.

10. For the system shown gain with feedback is 200. Find feedback factor.

analog-circuits-questions-answers-effects-feedback-q10

a) 0.41

b) 5

c) 0.0041

d) It can be any real number

Answer: c

Explanation: A F = A/1+Aβ

A = A1 x A2 = 1200

Thus 1 + Aβ = 1200/200 = 6

Aβ = 5

β = 5/A = 0.0041.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Features of Power Amplifier”.

1. The use of amplifier in a circuit is to _____________ for input signal.

a) Provide a phase shift

b) Provide strength

c) Provide frequency enhancement

d) Make circuit compatible

Answer: b

Explanation: The only use of amplifier in a circuit is to provide strength to signal. This may refer to an increase in current, voltage or power of the output w.r.t the input being applied.

2. The unwanted characteristics of amplifier output apart from the desired output is collectively termed as ___________

a) Inefficiency

b) Damage

c) Fault

d) Distortion

Answer: d

Explanation: The unwanted characteristics of amplifier output apart from desired output are collectively termed as distortion. This should be avoided.

3. Unit of power rating of a transistor is expressed in ___________

a) Watts

b) KWh

c) W/s

d) Wh

Answer: a

Explanation: Power rating is the maximum power allowable to dissipate by a transistor beyond this point transistor may behave unlikely. This is expressed in watts.

4. Which device was used for the amplification of audio signals before the invention of power amplifiers?

a) Diode

b) Op-amp

c) Vacuum tubes

d) SCR

Answer: c

Explanation: Before the invention of power amplifier vacuum tubes are used for audio signal amplification which consumes large space and costly.

5. Power amplifier directly amplifies ___________

a) Voltage of signal

b) Current of the signal

c) Power of the signal

d) All of the mentioned

Answer: d

Explanation: Power amplifier increases voltage as well as current. Increase in voltage or current is small compared to normal amplifiers. But power amplification has occurred ie. Voltage x current is more.

6. Input stage of power amplifier is also called ___________

a) First op

b) Beginning stage

c) Front end

d) Normal stage

Answer: c

Explanation: Input stage of the power amplifier is also called the front end.

7. Transistor in power amplifier is ___________

a) An active device

b) A passive device

c) A op-amp

d) A voltage generating device

Answer: a

Explanation: Transistor is an active device since transistor contains voltage sources which are necessary for amplification.

8. For a perfect power amplifier output power rating will be ________ if the output impedance is halved.

a) Halved

b) Squared

c) Doubled

d) Square rooted

Answer: c

Explanation: In the equation of power output for the power amplifier, the power is proportional to the square of the current and inversely proportional to the resistance. If the impedance is halved then power is doubled.

9. Which of the following audio speaker will be hard to be driven by a power amplifier?

a) 4ohm

b) 8ohm

c) 12ohm

d) 2ohm

Answer: d

Explanation: If the resistance of the audio amplifier is less, the output power of the transistor will be high since output current is increasing. Hence to drive a 2ohm speaker amplifier needs double power that for a 4ohm speaker.

10. The power rating of the amplifier is 100watts then the transistor can only operate at ___________

a) Power higher than 100w

b) Power lower than 100w

c) Power near to 100w

d) Power lower than 200W

Answer: b

Explanation: The power rating is 100 W, and that is the maximum allowable power usage of a transistor, beyond which it may damage. If the power is less than 100W, the circuit operates. Near to 100W, the power may also be higher than 100W, hence that option is incorrect.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Comparison of Amplifier Classes”.

1. Which of the following amplifier class have the highest linearity and lowest distortion?

a) Class A

b) Class B

c) Class C

d) Class B push-pull

Answer: a

Explanation: Class A amplifier has the highest linearity and the lowest distortion. The amplifying element is always conducting and close to the linear portion of its transconductance curve. The point where the device is almost off is not at a zero signal point and hence its distortions compared to other classes are less.

2. Which of the following letter is not used to represent a class?

a) D

b) E

c) C

d) K

Answer: d

Explanation: There is no amplifier called Class K. There are only A, B, C, D, E/F, G, H, S.

3. Which of the following letter is not used to represent a class?

a) I

b) H

c) G

d) S

Answer: a

Explanation: There is no amplifier called Class I. There are only A, B, C, D, E/F, G, H, S.

4. Which of the following class has the poorest linearity

a) Class A

b) Class B

c) Class C

d) Class AB

Answer: c

Explanation: Class C amplifiers have high efficiency but have the poorest linearity since they only take less than 180° oscillations. They are suitable for amplifying constant envelope signals.

5. Which of the following amplifier cannot be used for audio frequency amplification?

a) Class A

b) Class C

c) Class AB

d) Class B push-pull

Answer: b

Explanation: Class C amplifier cannot be used for audio frequency amplifiers because of its high distortion.

6. Which of the following amplifier is less efficient than others?

a) Class C

b) Class B

c) Class A

d) Class AB

Answer: c

Explanation: Class A amplifiers are the least efficient of all. A maximum of 25% theoretical efficiency is obtainable, 50% for when using transformer or with induced coupling. This wastes power, as well as increases the cost and requires higher rated output devices.

7. Which of the following amplifier is designed to operate in digital pulses?

a) Class D

b) Class C

c) Class AB

d) Class B

Answer: a

Explanation: Class D amplifiers use a form of PWM to control the output devices. Conduction angle varies with the pulse width and doesn’t depend on the input directly. The analog signal is converted into a stream of pulses representing the signal using a modulation technique.

8. Which of the following class have a theoretical efficiency of 50%?

a) Class A

b) Class C

c) Class AB

d) Class D

Answer: a

Explanation: Class A amplifier has a theoretical efficiency of 50%. 50% of the energy supplied is a waste.

9. Which of the following class have a theoretical efficiency of 78.5%?

a) Class A

b) Class D

c) Class C

d) Class B

Answer: d

Explanation: Class B amplifier has a theoretical efficiency of 78.5% which higher than Class A while Class D theoretically have efficiency of 100%.

10. Which of the following amplifier is most suited for making tuning circuits?

a) Class A

b) Class B

c) Class C

d) Class D

Answer: c

Explanation: Class C is the most suitable amplifier type for tuning circuit and radio frequency amplification. It employs filtering and hence the final signal is completely acceptable. Class C amplifiers are quite efficient than other types.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Distortion in Amplifier-1”.

1. The problem in which output signal is not an exact reproduction of output signal in the amplifier is collectively called __________

a) Thermal runaway

b) Phase error

c) Distortion

d) Biasing error

Answer: c

Explanation: The deviation of output from an exact copy of input signal with amplification is collectively known as the distortion of the amplifier. They are of a different kind.

2. Which of the following is not a reason for distortion in amplifier output?

a) Incorrect biasing level

b) Sinusoidal input

c) Non- linear amplification

d) Large input signal

Answer: d

Explanation: Incorrect biasing level that is, if biasing level is not properly managed improper gain may lead to distortion. Non-linear amplification is a common reason for distortion in the case of transistor. If the input signal is large then output exceed the maximum peak of output that can be provided by an amplifier.

3. Amplitude distortion is due to ___________

a) Shift in Q-point

b) Change in input

c) Linear amplification

d) Small input signal

Answer: a

Explanation: If we incorrectly design our amplifier and a change in Q-point occurs, then distortion in the amplifier is observed. Also, if we apply too large an input signal, it may end up causing distortion.

4. If output of amplifier exceeds maximum allowable value ___________ occurs in output waveform.

a) Clipping

b) Clamping

c) Rectifying

d) Rounding

Answer: a

Explanation: If amplifier output is beyond the maximum value it cannot display voltage further than maximum value. This constitute clipping. This maximum output value depends on the source voltage of the amplifier, and can’t exceed the value.

5. Flat tops in the output signal is due to ___________

a) Frequency distortion

b) Amplitude distortion

c) Phase distortion

d) Harmonic distortion

Answer: b

Explanation: If amplifier output is beyond maximum value it cannot display voltage further than maximum value. This constitute clipping and creates flat tops in the output wave. This is due to amplitude distortion in the amplifier.

6. Frequency distortion occurs when _______ is varied with frequency.

a) Amplitude

b) Amplification

c) Distortion

d) Output

Answer: b

Explanation: Due to abnormalities of transistor level of amplification varies with a frequency which constitute frequency distortion.

7. Phase distortion can also be called as _________

a) Frequency distortion

b) Amplitude distortion

c) Delay distortion

d) Harmonic distortion

Answer: c

Explanation: Another name for phase distortion is delay distortion. It is called so because it associated with a delay.

8. The distortion caused by multiple frequencies in output is called _________

a) Amplifier distortion

b) Harmonic distortion

c) Phase distortion

d) None of the mentioned

Answer: b

Explanation: The distortion happened due to the presence of harmonic frequencies in output is known as harmonic distortion.

9. Harmonic distortion is caused by nonlinearities of _________

a) Voltage divider circuit

b) Resistive elements only

c) Passive elements

d) Active elements

Answer: d

Explanation: Harmonic distortion is caused by Active elements in the circuit.

10. Which of the following components in a transistor circuit is really responsible for harmonic distortion?

a) Capacitor

b) Resistor

c) Transistor

d) Inductance

Answer: c

Explanation: Harmonic distortion is caused by Active elements in the circuit. Hence transistor is causing harmonic distortion.

This set of Analog Circuits online test focuses on “Distortion in Amplifier – 2”.

1. THD+N is a scale used to expressing _______ of an audio amplifier.

a) Gain

b) Sound quality

c) Amplification factor

d) Distortion

Answer: b

Explanation: THD+ N refers to Total Harmonic Distortion plus Noise. It is a much more comparable quantity between different devices. It can be used to express the quality of an audio amplifier and is measured using a distortion analyzer.

2. THD is a measure of ____________

a) Amount of harmonic content present in a signal

b) Amount of output power

c) Total amount of distortion

d) Total amount of amplitude distortion

Answer: a

Explanation: THD is a measurement of the harmonic distortion present in a signal. It is the ratio of sum of power of all harmonic components to the power of the fundamental frequency of the signal.

3. The ratio of the RMS amplitude of the higher order harmonic frequencies to the RMS amplitude of the fundamental frequency is commonly called __________

a) Total harmonic power

b) Total amplitude distortion

c) Total frequency distortion

d) Total harmonic distortion

Answer: d

Explanation: THD is the ratio of RMS amplitude of higher order harmonic frequencies to the RMS amplitude of the fundamental frequency. THD is expressed in percentage.

4. Intermodulation distortion is caused by __________

a) Presence of harmonic components in signal

b) Non- linearity of biasing circuit

c) Non-linearity of amplifier

d) High frequency signal

Answer: c

Explanation: Intermodulation is the amplitude modulation of signals containing two or more frequencies, and this is caused by non-linearity of the system. Intermodulation of frequencies will form additional unwanted components at multiple frequencies. It can also give rise to spurious emissions in radio transmission, often in form of sidebands.

5. The ratio of the RMS value of additional frequency components in output to the RMS value of the original output of the amplifier is called __________

a) Intermodulation distortion

b) Total amplitude distortion

c) Total frequency distortion

d) Total harmonic distortion

Answer: a

Explanation: The ratio of the RMS value of additional frequency components in output to the RMS value of the original output of the amplifier is known as intermodulation distortion. These additional frequency components can be harmonics, as well as sums and differences of the original frequencies, as well as the sum and differences of the harmonics.

6. Second order harmonic distortion is __________

a) Amount of second harmonics and first harmonics in signal

b) Amount of second harmonics and fourth harmonics in signal

c) Amount of second harmonics present in signal

d) RMS value of all even harmonics in signal

Answer: c

Explanation: Second harmonic distortion is the amount of second harmonic signal present in signal. It is important since second harmonic is most troublesome among other harmonics.

7. Power delivered to load is _________ with an increase in harmonic distortion.

a) Increases

b) Decreases

c) Constant

d) Cannot predict

Answer: a

Explanation: The equation of output power (P ac )D = P ac (1+D 2 ). It is clear that output power increases with distortion.

8. In three-point method the harmonics which are considered for calculating distortion is __________

a) First harmonics only

b) First and Second harmonics only

c) First, Second and Third harmonics only

d) Second and Third harmonics only

Answer: b

Explanation: In three-point method, the distortion due to first and second harmonics are considered.

9. If D1, D2, D3, D4 are the distortion produced by second, third, fourth, fifth respectively . Then total harmonic distortion is __________

a) √(D1 2 +D2 2 +D3 2 +D4 2 )

b) √(D1 2 +D3 2 )

c) √(D2 2 +D4 2 )

d) √(D1 2 +D2 2 )

Answer: a

Explanation: Resultant harmonics is RMS value of individual harmonics.

10. Power delivered to load calculated by five-point method can be equal to __________

(P ac is power delivered to load without distortion and D is the RMS of all Harmonic distortion)

a) P ac

b) P ac /D2

c) P ac

d) P ac D2

Answer: c

Explanation: The equation of power delivered to load is same whether it is calculated by three-point or five point. The only difference is the calculation of D.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Heat Sink for Power Transistor-1”.

1. What is the purpose of heat sink in transistor circuit?

a) Provide sufficient heat for transistor

b) Absorb excess heat from transistor

c) Keep transistor at desired temperature range

d) All of the mentioned

Answer: d

Explanation: Heat sink in a transistor circuit performs a major function of keeping temperature of transistor at a desired range and also absorbs excess heat. Self heating occurs in a transistor due to power dissipated at the collector junction. This can cause junction temperature to rise and further increases collector current, and such a process may damage the device.

2. What is the major principle behind heat sink action?

a) Avogadro’s law

b) Fourier’s law

c) Archimedes principal

d) Faraday’s law

Answer: b

Explanation: Major principle behind heat sink is Fourier’s law. Fourier’s law of heat conduction, simplified to a one-dimensional form is, when there is a temperature gradient heat will be transferred from the higher temperature region to the lower temperature region. The rate at which heat is transferred by conduction is proportional to the product of the temperature gradient and the cross-sectional area through which heat is transferred.

3. Comparing high heat objects with cooling objects which one will have slow-moving molecules?

a) High heat objects

b) Cooling objects

c) Both of them have equal molecular movement

d) Cannot be predicted

Answer: b

Explanation: Since temperature is low for cooling objects the energy of molecule will also be low.

4. If water is used as a cooling medium then it is termed as _______________

a) liquid plate

b) aqua plate

c) hot plate

d) cold plate

Answer: d

Explanation: heat sink transfers thermal energy from a high-temperature medium to a low-temperature medium like air, water etc. Usually air is used as a low-temperature medium. If water is used as medium, then it is termed as cold plate.

5. Active heat sinks are also called as ___________

a) fans

b) on sinks

c) high sinks

d) normal sinks

Answer: a

Explanation: Active heat sinks are also called as fans. Fans can be classified into ball bearing type and sleeve bearing type.

6. Passive heat sinks are made of ________________

a) Copper

b) Aluminum

c) Iron

d) Zinc

Answer: b

Explanation: The thermal conductivity of aluminum is about 235 W/mK; it is the cheapest and lightweight metal. Aluminum heat sinks are also called extruded heat sinks because they can be made using the extrusion technique.

7. Difference between the active heat sink and passive heat sink is that passive heat sink?

a) Possess mechanical components

b) Possess electrical components

c) Do not possess mechanical components

d) Do not possess metal components

Answer: c

Explanation: Unlike active heat sink passive heat sink do not possess any mechanical component and are made of aluminum finned radiator. Thus these passive heat sinks are cheaper than the active ones and only use convection to dissipate thermal energy. They are more reliable since they have no moving parts but the performance of active sinks is better in dissipating heat.

8. Which of the following heat sink is more durable?

a) Stamped heat sink

b) Ball bearing type heat sink

c) Sleeve bearing type heat sink

d) Aluminum heat sink

Answer: d

Explanation: The more durable heat sink among this is aluminum heat sink.

9. Active heat sinks are less durable than passive heat sink because of the presents of __________

a) Complex electrical network

b) Non-metal components

c) Metal components

d) Moving components

Answer: c

Explanation: Active heat sink include moving components and hence it should be periodically serviced.

10. Aluminum heat sink is also called ___________

a) Folded-Fin heat sink

b) Bonded-Fin heat sink

c) Sleeve bearing type heat sink

d) Extrusion heat sink

Answer: d

Explanation: Aluminum heat sinks are also called as extruded heat sinks as they can be made using extrusion. Aluminum is the most common heat sink material, light in weight and costs less than Cu and other materials, and has relatively good thermal conductivity.

This set of Analog Circuits online quiz focuses on “Heat Sink for Power Transistor-2”.

1. Which of the following heat sink is used for low power application?

a) Stamped heat sink

b) Machining heat sink

c) Aluminum heat sink

d) Bolded-Fin heat sink

Answer: a

Explanation: Stamped heat sinks are made of metal that is stamped to form a particular shape. These are cheaper compared to extruded heat sinks. These are used for low-power applications and hence these are low in performance.

2. The performance of heat sink does not depend upon ___________

a) Choice of material

b) Protrusion design

c) Surface treatment

d) None of the mentioned

Answer: d

Explanation: The performance of the heat sink depends on the factors like the choice of material, protrusion design, surface treatment and air velocity. The material is preferred to have high conductivity and heat absorption. The shape and design also effect heat flow as well as coolant flow in the sink.

3. What is a heat spreader?

a) An older version of a heat sink

b) Another name for heat sink

c) Device to transfer heat from device to the sink

d) A connector for coolant to flow

Answer: c

Explanation: A heat spreader conducts heat between a heat source and a heat sink. Most commonly, a block of material with high thermal conductivity is used as a heat spreader.

4. Heat dissipation from heat sink take place primarily by ___________

a) Conduction

b) Convection

c) Radiation

d) All of the mentioned

Answer: d

Explanation: Heat dissipation from heat sink take place primarily by convection since there is no actual contact between heat sink and transistor. Heat dissipation also takes place by Radiation but it is comparatively low.

5. Heat sinks are provided with peripheral fins to ___________

a) Provide good appearance

b) Increase heat absorption

c) Increase surface area of heat dissipation

d) Provide material stability

Answer: c

Explanation: Heat sinks are provided with peripheral fins to increase surface area of heat conduction. Increase in dissipation also increases absorption but more correct option is “Increase surface area of heat dissipation”.

6. Heat sinks are usually provided with black anodized finish to ___________

a) Enhance heat dissipation by radiation

b) Enhance heat dissipation by convection

c) Prevent electrical connection

d) Remove dust accumulation

Answer: a

Explanation: Heat sinks are usually provided with black anodized finish to enhance heat dissipation by radiation. Anodizing thickens and toughens the naturally occurring protective oxide layer on the metal surface. It provides dielectric isolation between cooling components and the electronics in the device.

7. Which substance is used to maintain electrical insulation between a heat sink and transistor?

a) plastic

b) fiber

c) ceramic

d) mica

Answer: d

Explanation: Many transistors have metal cases which are connected to a lead and thus it becomes necessary to insulate the heat sink from the transistor. Insulating kits of a mica sheet and a plastic sleeve are used.

8. De-rating factor is usually expressed in ___________

a) W/°C

b) °C/W

c) W/s

d) kW/K

Answer: a

Explanation: De-rating factors for determining the power dissipation rating is usually given at any temperature above 25°C. The de-rating factor is specified in W/°C.

9. Cavities embedded in heat source is also known as ___________

a) Low sink

b) Sink hole

c) On-sink

d) Inverted sink

Answer: d

Explanation: Cavities embedded in heat source is also known as an inverted sink.

10. By dividing volumetric thermal resistance by required thermal resistance we will obtain ___________

a) Power dissipation of heat sink

b) Volume of heat sink

c) Maximum temperature of heat sink

d) Volume of surrounding air

Answer: b

Explanation: By dividing volumetric thermal resistance by required thermal resistance we will obtain the volume of heat sink.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Push-Pull Class B Amplifier”.

1. Which of these is not true for a class B amplifier?

a) It has zero DC bias

b) They have an efficiency less than that of class A amplifiers

c) The quiescent power dissipation is zero

d) The conduction angle is only 180°

Answer: b

Explanation: The class B amplifier has zero DC bias as the transistors are biased at cut-off only. Each transistor conducts when the input is greater than the base-emitter voltage. The conduction angle is only 180° for this amplifier. They have higher efficiency than class A amplifiers.

2. What is the output of a class B amplifier for sinusoidal input?

a) Sinusoidal amplifier

b) Half-sinusoidal

c) Sinusoidal with higher frequency

d) Square wave

Answer: b

Explanation: If Q-point is in cut-off, then I C varies only in the positive direction, for saturation, it varies in the negative direction. So the output of Class B amplifier is half sinusoidal. There is no effect in the shape or the frequency of the wave.

3. How do we obtain sinusoidal output out of a class B amplifier?

a) By using non-sinusoidal inputs

b) By utilizing two transistors

c) By biasing it in the active region

d) By adding a capacitor to the output

Answer: b

Explanation: To obtain sinusoidal output from a class B amplifier, two transistors must be used. Such a circuit is a class B push-pull amplifier, used in unturned power amplifiers and audio frequency power amplifiers.

4. In a class B amplifier, it is found that DC power is 25W, find the ac power.

a) 10 W

b) 62.5 W

c) 25 W

d) 50 W

Answer: b

Explanation: For a class B amplifier, figure of merit = 0.4 = dc power/ac power

Thus AC power = DC power/0.4 = 25/0.4 = 62.5 W.

5. When is the maximum efficiency of class B amplifier achieved?

a) When V MAX = V CC

b) When two transistors are used

c) When V MIN = 0

d) Efficiency is always constant

Answer: c

Explanation: Efficiency % = [1-V MIN /V CC ] x 78.5

Maximum efficiency occurs when V MIN =0 and efficiency is 78.5%.

6. What is the disadvantage of a class B push-pull amplifier?

a) The efficiency reduces

b) The figure of merit increases

c) The cross-over distortion occurs

d) The Q-power dissipation is very large

Answer: c

Explanation: A class B amplifier helps increase efficiency, and the figure of merit reduces. The q power dissipation reduces and cross over distortion increases. Due to two transistors, when one transistor turns off the other does not begin conduction immediately, hence output current is zero for a short interval.

7. Read statements and select the correct option below.

A: A push-pull amplifier decreases harmonic distortion

B: Output has half-wave symmetry

a) A and B are both correct and B is the correct reason for A

b) A is correct and B is incorrect

c) Both A and B are correct but B is not the correct reason for A

d) Both A and B are incorrect

Answer: c

Explanation: A push-pull amplifier reduced harmonic distortion as it cancels even harmonic frequencies. Net current in load I=K

Due to this, even harmonics cancel out and decrease harmonic distortion. Thus output has half-wave symmetry.

8. Why does no DC current flow in the primary winding of the output transformer of class B push-pull amplifier?

a) Because DC currents from both transistors flow in opposite directions

b) Because the net impedance is very high to allow flow of current

c) The winding only allows AC current to flow

d) Current only flows in secondary winding due to the presence of load at that side

Answer: a

Explanation: The net DC current in the primary winding of the output transformer is zero because DC collector currents of both transistors being used flow in opposite directions and hence transformer saturation doesn’t occur.

9. Which of these is incorrect for complementary symmetry push-pull amplifiers?

a) During positive cycle NPN transistor conducts

b) It is easier to fabricate on IC

c) Size of the transformer required reduces

d) Efficiency and figure of merit are same as transformer coupled push-pull amplifier

Answer: c

Explanation: The complementary symmetry push-pull amplifier uses one NPN and one PNP transistor to conduct in positive and negative cycles respectively. It does not affect efficiency or figure of merit, but since no transformer is being used, it is easier to fabricate on ICs.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Introduction to Oscillator”.

1. Oscillators are used to ______ AC voltage.

a) Prevent

b) Generate

c) Amplify

d) Rectify

Answer: b

Explanation: Oscillators are used for generating AC voltage. They are often characterized by the frequency of the oscillations produced. There are two main types of electronic oscillators, linear/harmonic and nonlinear/relaxation oscillator.

2. Oscillator __________ an AC input for giving an AC output.

a) Doesn’t need

b) Need

c) Doesn’t need at lower frequencies

d) Doesn’t need at higher frequencies

Answer: a

Explanation: An oscillator is an amplifier with positive feedback. It usually has a noise which is an amplifier as an oscillating output. They do not require any type of specific input to function properly.

3. Negative resistance are incorporated in oscillator for ___________

a) Sustained oscillation

b) Damped oscillation

c) Biasing the oscillator

d) Increasing amplitude of oscillation

Answer: a

Explanation: Negative resistance are incorporated in oscillator for sustained oscillation. Negative resistance will cancel the damping by positive resistance.

4. For accomplishing negative resistance in oscillator we use _____________

a) Voltage divider circuit

b) Negative feedback

c) Positive feedback

d) Current divider circuit

Answer: c

Explanation: The input or output impedance of an amplifier with positive feedback applied, can be negative. When loop gain is greater than 1, the input impedance is a negative value, over a linear range. These are also called active resistors.

5. Primary trigger for oscillation is obtained from ___________

a) DC voltage

b) Noise voltage

c) External trigger voltage

d) No trigger is required

Answer: b

Explanation: The primary trigger for oscillation is obtained from noise voltage.

6. The AC power of output signal is obtained by ___________

a) Input AC voltage

b) Input DC voltage

c) DC biasing voltage

d) Power is generated by transistor itself

Answer: c

Explanation: The Ac power of output signal is obtained by DC biasing voltage of amplifier.

7. The output of a stable oscillator have ___________

a) Constant amplitude

b) Varying amplitude

c) Constant amplitude at high frequencies only

d) Constant amplitude at low frequencies only

Answer: a

Explanation: Output of a stable oscillator have constant amplitude and frequency. A common criteria is the Barkhausen stability criteria, wherein it states that loop gain should be unity and feedback should be positive.

8. The output waveform of a stable oscillator have ___________

a) Constant frequency at low amplitude only

b) Constant frequency at high amplitude only

c) Variable frequency

d) Constant frequency

Answer: d

Explanation: Output of a stable oscillator have constant amplitude and frequency.

9. In an oscillator if phase of feedback is same as that of oscillation waveform then feedback is called ___________

a) Positive feedback

b) Negative feedback

c) Cannot be predicted

d) Either positive or negative depending upon frequency

Answer: a

Explanation: In an oscillator if phase of feedback is same as that of oscillation waveform then feedback is called positive feedback.

10. The output of oscillator will not depend upon ___________

a) Feedback

b) Amplifier

c) Both feedback and amplifier

d) Input voltage

Answer: d

Explanation: The output of the oscillator will not depend upon input voltage. There is no input voltage for an oscillator.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Classification of Oscillator-1”.

1. Frequency of oscillation of alternator is ___________

a) 100Hz

b) 50Hz

c) 1KHz

d) 200Hz

Answer: b

Explanation: Alternator frequency depends upon the speed of rotation and the number of pairs of rotor poles. When connected to a power system, alternators are synchronized with the grid frequencies which is either 50/60Hz depending on the geographical location.

2. Oscillation can be classified as damped and sustained on the basis of varying.

a) Input power

b) Frequency

c) Amplitude

d) Noise margin

Answer: c

Explanation: Oscillation can be classified as damped and sustained on the basis of varying amplitude.

3. Damped oscillations are those oscillations which ___________ continuously with time.

a) Increasing

b) Decreasing

c) Increasing or decreasing

d) Neither increasing nor decreasing

Answer: c

Explanation: Damped oscillations are those oscillations which decrease or increases continuously with time.

4. If the oscillation amplitude decreases continuously it is called ___________

a) Overdamped

b) Underdamped

c) Sustained

d) No specific name

Answer: b

Explanation: If the oscillation amplitude decreases continuously it is called underdamped oscillation.

5. If oscillation amplitude increases continuously it is called ___________

a) Overdamped

b) Underdamped

c) Sustained

d) No specific name

Answer: a

Explanation: If oscillation amplitude increases continuously it is called overdamped oscillation.

6. Which of the following is not an example of sinusoidal oscillator?

a) RC phase shift oscillator

b) Weinbridge oscillator

c) Crystal oscillator

d) Blocking oscillator

Answer: d

Explanation: A blocking oscillator is a non-sinusoidal oscillator. It produces a free running signal-square shaped and requires only a resistor, transformer and one amplifying element to work. The transistor is blocked off for most of the duty cycle, producing periodic pulses.

7. Mark-to-space ratio is related with ___________

a) Saw-tooth generator

b) LC oscillator

c) RC oscillator

d) Crystal oscillator

Answer: a

Explanation: MSR or Mark-to-space ratio is related with saw-tooth generator. It is the ratio of width of pulse to time between pulses.

8. The ratio of width of pulse to time between pulses are called ___________

a) PSRR

b) PSR

c) MSR

d) CMRR

Answer: c

Explanation: The ratio of the width of pulse to time between pulses is called MSR . Other abbreviation denotes PSRR , PSR , CMRR .

9. The time between one pulse to another is known as ___________

a) MSR

b) PRF

c) Time delay

d) PRT

Answer: d

Explanation: The time between one pulse to another is known as PRT , other abbreviations denote PRF , MSR .

10. The inverse of pulse repetition time gives _____________

a) PRF

b) PRT

c) MSR

d) PSR

Answer: a

Explanation: The inverse of pulse repetition time gives the PRF- pulse repetition frequency. MSR means mark to space ratio, PRT means power repetition time, PSR is power supply rejection.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Classification of Oscillator-2”.

1. Which of the following is not an example of non-sinusoidal oscillator?

a) Sawtooth Generators

b) Blocking oscillators

c) Multivibrator

d) Crystal oscillators

Answer: d

Explanation: The sawtooth generator generates an output resembling the teeth of a plain toothed saw. A blocking oscillator is a free running generator, used to produce narrow trigger pulses. A multivibrator is used to produce an output varying between 2 states- a high and low, producing square waves of a different duty cycle. A crystal oscillator is the only one of all used to produce sinusoidal signals.

2. Which of the following is not an LC oscillator?

a) Hartley Oscillator

b) Colpitts oscillator

c) Crystal oscillator

d) Clapp oscillator

Answer: c

Explanation: Crystal oscillator is not an LC oscillator because it does not contain any L or C.

3. The sinusoidal oscillator is also called ___________

a) LC oscillator

b) Harmonic oscillator

c) RC oscillator

d) Crystal oscillators

Answer: b

Explanation: Sinusoidal oscillators are called harmonic oscillators.

4. Which type of oscillators is used in timing elements?

a) RC oscillator

b) LC oscillator

c) Crystal oscillator

d) Weinbridge oscillators

Answer: c

Explanation: Crystal oscillators are best suitable for the use in timing elements because of its high frequency stability. We can obtain precise, high and stable frequency of operation. There is very low frequency drift over time.

5. Which of the following oscillator is not using a feedback network for its oscillation?

a) LC oscillator

b) RC oscillator

c) Crystal oscillator

d) Relaxation oscillators

Answer: d

Explanation: UJT relaxation oscillator doesn’t have a feedback system for oscillation.

6. Low frequency oscillators have a frequency range of ___________

a) 20 Hz-20K Hz

b) 20 Hz -100k Hz

c) 1 Hz -20k Hz

d) 50 Hz -100k Hz

Answer: b

Explanation: Low frequency oscillators are also called Audio frequency oscillators. It operates in low frequencies, that is from 20Hz to 100-200KHz.

7. High frequency oscillators have a frequency range of ___________

a) 300K Hz-2G Hz

b) 100k Hz-500k Hz

c) 8k Hz-800K Hz

d) 4K Hz-1G Hz

Answer: a

Explanation: High frequency oscillators are also called Radio frequency oscillators. It has a range of 300KHz to several megahertz.

8. Which of the following oscillator cannot be used in low frequency oscillations?

a) Wein bridge oscillators

b) RC phase shift oscillators

c) Colpitts oscillators

d) RC oscillators

Answer: c

Explanation: Since Colpitts oscillator is an LC oscillator it cannot be used as a low frequency oscillator. Capacitor present provides a low reactance path to HF signals and thus provides excellent performance in the high frequency region, even in microwave.

9. Which of the following oscillator is will give the most stable output oscillation frequency?

a) Colpitts oscillator

b) Clapp oscillator

c) Wein bridge oscillator

d) Crystal oscillator

Answer: d

Explanation: Crystal oscillator gives the most stable oscillation. It is the only one not consisting of R, L, C elements and does not deteriorate over time easily. It provides high stability and precision over a range of frequencies.

10. Relaxation oscillators are also known as ___________

a) Multivibrator

b) Phase shift oscillators

c) Blocking oscillators

d) Saw tooth generator

Answer: a

Explanation: Relaxation oscillators are also called multivibrators.

This set of Basic Analog Circuits Questions and Answers focuses on “RC Phaseshift Oscillator”.

1. RC phase shift oscillators contain a minimum of _________ Phase shift network.

a) 1

b) 2

c) 3

d) 0

Answer: c

Explanation: RC phase shift oscillator contains a minimum of three phase shift networks. There can be also four and it increases the stability of oscillation. They yield a pure sine wave for a variety of loads.

2. One phase shift network of an RC phase shift oscillator contain __________ capacitor.

a) 1

b) 2

c) 3

d) 0

Answer: a

Explanation: One phase shift network of an RC phase shift oscillator contains one capacitor and one resistor. This single network causes a phase shift of 60° and a total of 180° through the amplifier stage and 180° through the second inverting stage, a total of 0.

3. One phase shift network of an RC phase contain _________ inductor.

a) 1

b) 2

c) 3

d) 0

Answer: d

Explanation: One phase shift network of an RC phase shift oscillator contains one capacitor and one resistor. There is no need of an inductor.

4. One phase shift network of an RC phase contain __________ resistor.

a) 1

b) 2

c) 3

d) 0

Answer: a

5. Phase shift provided by one phase shift network in RC phase shift oscillator in 3 stage is ___________

a) 180 degrees

b) 60 degrees

c) 120 degrees

d) 90 degrees

Answer: b

Explanation: Phase shift provided by one phase shift oscillator in RC phase shift oscillator in 3 stage is 60 degrees. It is 180/number of stages.

6. Total phase shift provided by all phase shift networks in RC phase shift oscillator is ___________

a) 180 degrees

b) 60 degrees

c) 120 degrees

d) 360 degrees

Answer: a

Explanation: To satisfy Barkhausen’s criteria total phase shift should be 360 degrees. 180 degrees is produced by amplifier and rest by phase shift network even it is three stage or four stage.

7. The phase shift network will produce a phase shift of 180 degrees at ___________

a) Three different frequencies

b) One frequency

c) Two different frequencies

d) Infinitely many frequencies

Answer: b

Explanation: The phase shift oscillator will produce a phase shift of 180 degrees only at a particular frequency by which it is meant to oscillate.

8. Which of the following is not a reason for beginning oscillations in RC phase shift oscillator?

a) Phase shift network

b) Noise inherent in transistor

c) Minor variations in the voltage DC source

d) Square wave signal

Answer: a

Explanation: Phase shift network doesn’t initialize the oscillation it just phase shift a given frequency. Oscillation will start by noise inherent of transistor or by minor voltage variations in DC source.

9. Amplifier gain for RC phase shift oscillation, to obey Barkhausen’s criteria should be minimum of ___________

a) 43

b) 4

c) 10

d) 29

Answer: d

Explanation: Amplifier gain should be a minimum of 29 or else Aβ will be less than one.

10. Phase shift provided by one phase shift network in RC phase shift network in 4-stage will be ___________

a) 180 degrees

b) 45 degrees

c) 60 degrees

d) 90 degrees

Answer: b

Explanation: Phase shift provided by one phase shift oscillator in RC phase shift oscillator in 4 stage is 45degrees. It is 180/number of stages.

11. Frequency of oscillation for three section RC phase shift network is given by ___________

a) 1/ᴨ

b) 2/ᴨ

c) 1/ᴨ

d) 1/

Answer: c

Explanation: For an RC phase shift oscillator the frequency formula is 1/2πRC√2N where N is the total number of RC stages. For a 3 stage circuit, the frequency is 1/2πRC√6.

12. Distortion level in the output of RC phase shift network will be less than ___________

a) 1%

b) 2%

c) 5%

d) 10%

Answer: c

Explanation: Distortion in the output of phase shift oscillator is less 5%.

13. Which of the following is not true for an RC phase shift oscillator?

a) Not Bulky

b) Less costly

c) Effective for oscillation less than 10KHz

d) Pure sine wave output is possible

Answer: d

Explanation: Since only one frequency can fulfill barkhausen’s criteria requirement positive feedback occurs only for one frequency. Hence pure sine wave is not possible.

14. The feedback factor for RC phase shift oscillator is ___________

a) 1/18

b) 1/29

c) 1/11

d) 1/33

Answer: b

Explanation: The feedback factor for RC phase shift oscillator is 1/29 and to satisfy Barkhausen’s criteria amplifier gain should be greater than 29.

15. What will be oscillator frequency, if phase shift network of 3stages of RC phase shift oscillator contains a capacitor of 7nF and a resistance of 10K in each stage?

a) 928 Hz

b) 1KHz

c) 1.2KHz

d) 895Hz

Answer: a

Explanation: Oscillator frequency can be given by the equation analog-circuits-basic-questions-answers-q15 .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Weinbridge Oscillator”.

1. Which of these is incorrect for a Wien Bridge oscillator?

a) Low distortion

b) Good stability at the resonant frequency

c) Difficult to tune

d) Based on frequency selective form of a Wheatstone bridge

Answer: c

Explanation: A Wien Bridge oscillator is a two-stage RC coupled amplifier circuit that has good stability at the resonant frequency. It has low distortion and is easy to tune. It is called so because the circuit is based on a frequency-selective form of the Wheatstone bridge.

2. At the resonant frequency, what is the phase shift for the output in a Wien Bridge oscillator?

a) 0°

b) 45°

c) 90°

d) 180°

Answer: a

Explanation: The Wien Bridge oscillator uses a feedback circuit which consists of a series RC circuit which is connected with a parallel RC network, producing a phase delay or phase advance circuit depending on the frequency, which is however 0° at the resonant frequency.

3. Consider the circuit shown below.

analog-circuits-questions-answers-weinbridge-oscillator-q3

Given that R1=20kΩ, C1=2nF, R2=20kΩ, C2=2nF, find the approximate resonant frequency.

a) 4kHz

b) 3kHz

c) 25kHz

d) 15kHz

Answer: a

Explanation: The resonant frequency for the above Wien Bridge Oscillator circuit is f r = 1/2πRC and since R1=R2 and C1=C2 for this oscillator, for a balanced bridge, we can use either of those.

Hence f r = 3.987 kHz≈4kHz.

4. The following circuit is provided. R1=R2 and C1=C2.

analog-circuits-questions-answers-weinbridge-oscillator-q4

What is the correct choice for sustained oscillation?

a) R1 = R2

b) R4 = 2R3

c) R4 = 3R3

d) R1 = R2 = R3 = R4

Answer: b

Explanation: For sustained oscillation, the gain required is given by A V = 3

Thus, in the above circuit 1+R4/R3 = 3

Thus R4 = 2R3 is the relation required.

5. Which of these is a disadvantage of the Wien Bridge oscillator?

a) It cannot fabricate a pure tune

b) Distortion observed in output is high

c) It cannot be used for high resistance values

d) There is no automatic gain control

Answer: c

Explanation: A Wien Bridge oscillator provides a stable low distortion output over a wide range of frequency. However, the number of components required is high and the Wheatstone bridge applied cannot be used for high resistance values.

6. In the below circuit, the output frequency is 0.5 Mhz.

analog-circuits-questions-answers-weinbridge-oscillator-q4

C1 = 5nF, R4 = 40kΩ, R3 = 20kΩ. Find the value of R.

a) 63Ω

b) 220Ω

c) 127Ω

d) 55Ω

Answer: a

Explanation: f = 1/2πRC

R = 1/2πfC = 63Ω.

7. For any Wien Bridge oscillator, R1 = R2 and C1 = C2 always in the bridge, provided the phase shift through the amplifier is zero.

a) True

b) False

Answer: b

Explanation: The bridge circuit is used as feedback for the oscillator, provided that phase shift through the amplifier is zero. At this point the bridge has to be balanced, however not necessarily that R1 = R2 and C1 = C2. This condition is just a case of the bridge being balanced.

8. In a Wien bridge oscillator, it is found that at the frequency ω O there is no phase shift in R F /R gain loop and the phase shift of the amplifier is also zero. Then what is the equation for the radian frequency, given R 1 , C 1 is the series network of bridge and R 2 , C 2 is the parallel network?

a) ω O =1/R 1 C 1

b) ω O =1/R 2 C 2

c) ω O =1/R 1 R 2 C 1 C 2

d) ω O =1/RFC 1 RC 2

Answer: c

Explanation: For no phase shift for the amplifier, the frequency of the output is given by ω O = 1/R 1 R 2 C 1 C 2 and R F /R = C 1 /C 2 + R 2 /R 1 . When R 1 =R 2 and C 1 =C 2 then R F = 2R.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Hartley Oscillator-1”.

1. Recommended frequency range of Harley oscillator is __________

a) 30KHz-30MHz

b) 1KHz-10MHz

c) 2Hz-3MHz

d) 0.5KHz-40MHz

Answer: a

Explanation: Recommended frequency range of the Hartley oscillator is 30KHz-30MHz. Frequencies higher or lower than this range will cause distortion.

2. Lower frequencies are not practically possible in the case of Harley oscillator because of the requirement of low ___________ value.

a) Capacitance

b) Resistance

c) Inductance

d) Gain

Answer: c

Explanation: Lower frequencies are theoretically possible in Hartley oscillator however in practice, the achievement of required inductive value is a problem.

3. Which type of feedback is used by Hartley oscillator?

a) Voltage series feedback

b) Current series feedback

c) Voltage shunt feedback

d) Current shunt feedback

Answer: a

Explanation: The feedback used in Hartley oscillator is Voltage series feedback.

4. Which component of Hartley oscillator is used in the feedback system?

a) Inductor

b) Resistor

c) Capacitor

d) Transistor

Answer: a

Explanation: Center tapped inductors are used in Hartley oscillator to ensure feedback. These are often in parallel to a variable capacitor, and feedback is sent into the base of the transistor.

5. Which of the following network is used to give feedback to transistor of Hartley oscillator?

a) Inductive fixed bias

b) Capacitive fixed bias

c) Inductive voltage divider

d) Capacitive voltage divider

Answer: c

Explanation: Inductive voltage divider bias is used, wherein a center tapped inductor in parallel to a capacitor is in the feedback network to the base of the transistor/amplifying element.

6. How many capacitors are there in the tank circuit of Hartley oscillator?

a) 1

b) 2

c) 3

d) 0

Answer: a

Explanation: There is only one capacitor is used in the tank circuit of Hartley oscillator.

7. How many inductors are there in the tank circuit of Hartley oscillator?

a) 1

b) 2

c) 3

d) 0

Answer: b

Explanation: There are two inductors in the tank circuit and one capacitor, in the Hartley oscillator. Often though, we use a center tapped inductor instead of two inductors.

8. The frequency of Hartley oscillator is expressed as __________

a) 1/ᴨ

b) 1/ᴨ

c) 1/ᴨ

d) √3/ᴨ

Answer: b

Explanation: Frequency of Hartley oscillator can be expressed as 1/ᴨ. L is the total cumulatively coupled mutual inductance if two separate coils are used with mutual inductance M. Frequency of oscillation can be adjusted by varying the tuning capacitor C or the inductance.

9. Active element used in Hartley oscillator is __________

a) Cell

b) Voltage regulator

c) Diode

d) Transistor

Answer: d

Explanation: Active element used in the Hartley oscillator is Transistor for amplification purposes.

10. Hartley oscillator uses which type of feedback?

a) Negative feedback

b) Positive feedback

c) No feedback

d) Positive or Negative depends upon the frequency

Answer: b

Explanation: As normal oscillators, Hartley oscillator also uses positive feedback for sustained oscillation.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Hartley Oscillator-2”.

1. If L1 and L2 are the inductance used in the Hartley oscillator, the effective inductance in the equation of frequency calculation is equal to .

a) /

b) L2 2 /

c) L1+L2

d) L1-L2

Answer: c

Explanation: Inductance L1 and L2 are series and hence effective inductance without mutual inductance will be L1+L2.

2. Which configuration of the transistor amplifier is used for Hartley oscillator?

a) Common emitter amplifier

b) Common collector amplifier

c) Common base amplifier

d) Combination of both common emitter and common collector

Answer: a

Explanation: Common emitter transistor configuration is used in Hartley oscillator to ensure good oscillation.

3. Phase shift provided by the overall tank circuit in Hartley oscillator is __________

a) 0 degree

b) 90 degree

c) 180 degree

d) -90 degree

Answer: c

Explanation: Phase shift provided by the tank circuit is 180 degrees to obey Barkhausen’s criteria for sustained oscillation.

4. The gain device in the Hartley oscillator act as a __________

a) Low pass filter

b) High pass filter

c) Band pass filter

d) Band rejection filter

Answer: c

Explanation: The gain device in Hartley oscillator act as a band pass filter.

5. The phase difference produced by the active element of Hartley oscillator is __________

a) 0 degree

b) 180 degree

c) 90 degree

d) 120 degree

Answer: b

Explanation: The coil has a tap such that the proper phase is available to the base of the transistor. Value of L and C are adjusted to give a phase shift of 180°. The transistor itself creates a 180° phase shift and hence total shift is 360°/0.

6. Hartley oscillator make use of ________ amplifiers.

a) Class A

b) Class B

c) Class C

d) Class D

Answer: c

Explanation: Hartley oscillator make use of class C amplifiers because it can amplify signals less than 180 degrees and provide output of full cycle.

7. The Hartley oscillator is less preferred than due to Colpitts oscillator’s performance in __________

a) All frequency region

b) Mid frequency region

c) High frequency region

d) Low frequency region

Answer: c

Explanation: The Hartley oscillator is less preferred than due to Colpitts oscillator’s performance in high frequency regions due to stability. Colpitt’s oscillator uses a capacitive voltage divider setup which provides better stability than an inductive voltage divider as in Hartley oscillator.

8. Example for a self-limiting oscillator is __________

a) Hartley oscillator

b) Weinbridge Oscillator

c) RC phase shift oscillator

d) Astable multivibrator

Answer: a

Explanation: LC oscillators are also called self-limiting oscillators.

9. What will be the oscillator frequency of Hartley oscillator if inductance L1, L2 are equal to 1mH and 2mH respectively and capacitor C is 10nF.

a) 50KHz

b) 29KHz

c) 40KHz

d) 57 kHz

Answer: b

Explanation: L1 = 1mH

L2 = 2mH

Effective inductance L = L1+L2 = 1+2 = 3mH

C = 10nF

Oscillator frequency analog-circuits-questions-answers-hartley-oscillator-2-q9 .

Frequency = 29kHz.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Colpitts Oscillator-1”.

1. Which type of feedback is used by Colpitts oscillator?

a) Voltage series feedback

b) Current series feedback

c) Voltage shunt feedback

d) Current shunt feedback

Answer: a

Explanation: Voltage series feedback is used in Colpitts oscillator. In voltage series feedback a part of output voltage is fed back to input.

2. Which component of Colpitts oscillator is used in feedback system?

a) Inductor

b) Resistor

c) Capacitor

d) Transistor

Answer: a

Explanation: A capacitor with a center tap or simply two capacitors in parallel to an inductor, acting as a voltage divider, acts as the feedback system, providing feedback to the base of the amplifying transistor. Oscillations across the capacitor are applied at the base-emitter junction and appear across the collector as an amplified output.

3. Which of the following network is used to give feedback to transistor?

a) Inductive fixed bias

b) Capacitive fixed bias

c) Inductive voltage divider

d) Capacitive voltage divider

Answer: d

Explanation: Capacitive voltage divider network is used for giving positive feedback in Colpitts oscillator. Oscillations across the capacitor are applied at the base-emitter junction and appear across the collector as an amplified output. The amount of feedback depends on the ratio of the two capacitors being used.

4. How many capacitors are there in the tank circuit of Colpitts oscillator?

a) 1

b) 2

c) 3

d) 0

Answer: b

Explanation: There are two capacitors in the tank circuit of Colpitts oscillator and it is given for voltage division.

5. How many inductors are there in the tank circuit?

a) 1

b) 2

c) 3

d) 0

Answer: a

Explanation: There are one inductor in the tank circuit of Colpitts oscillator and it is given for oscillation.

6. Capacitive circuit configuration in Colpitts oscillator improves _____________

a) Bulkiness

b) Frequency stability

c) Impedance

d) Appearance

Answer: b

Explanation: Capacitive circuit in the colpitt oscillator improves frequency stability. An additional 180° phase shift is provided by the capacitive tank circuit, providing no phase shift to the output. By changing tap position or the value of capacitors in the tank circuit, we can change feedback amount.

7. Active element used in Colpitts oscillator is _________

a) Cell

b) Voltage regulator

c) Diode

d) Transistor

Answer: d

Explanation: The active element used in Colpitts oscillator is transistor and it is used for amplification of weak oscillator signals.

8. RFC choke present in Collpitts oscillatory circuit is for _________

a) High reactance to oscillation

b) Low reactance to oscillation

c) Variable reactance to oscillation

d) Biasing to oscillation

Answer: a

Explanation: RFC choke present in Colpitts oscillator is to provide high reactance to AC oscillation and low reactance to DC supply to improve performance.

9. RFC choke is placed in Colpitts oscillator instead of resistor is to provide _________

a) High impedance to DC

b) High resistance to DC

c) Low resistance to DC

d) Less bulkiness

Answer: c

Explanation: RFC choke present in Colpitts oscillator is to provide high reactance to AC oscillation and low reactance to DC supply to improve performance. If resistor is used there will be some power loss in DC biasing which is unnecessary.

10. Resistors are provided in Colpitts circuit is to __________

a) Provide high impedance to oscillation

b) Bias transistor

c) Provide stability for tank circuit

d) increase impedance for oscillation

Answer: b

Explanation: Resistors are used to bias transistor to its DC operating point. Capacitor divider circuit provides input bias to the amplifying element.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Colpitts Oscillator-2”.

1. The frequency of Colpitts oscillator is expressed as __________

a) 1/ᴨ

b) 1/ᴨ

c) 1/ᴨ

d) √3/ᴨ

Answer: b

Explanation: The frequency of colpitts oscillator is expressed as 1/ᴨ where L is the inductance and C is effective capacitance.

2. Colpitts oscillator uses which type of feedback ________

a) Negative feedback

b) Positive feedback

c) No feedback

d) Positive or Negative depends upon frequency

Answer: b

Explanation: Colpitts oscillator uses positive feedback for oscillation. The feedback is provided through a capacitor voltage divider tank circuit to the amplifying element.

3. To ensure constant feedback which method is used in Colpitts oscillator ________

a) Gang tuning

b) Using same capacitor

c) No method is used

d) Voltage divider always gives constant feedback

Answer: a

Explanation: Frequency of oscillation is determined by the tank circuit and is varied by the gang tuning of two capacitors/center tapped capacitors. As they are tuned, thus as tuning is varied then values of both capacitors varies, and the ratio of both capacitors remains same.

4. If C1 and C2 are the capacitance used in Colpitts oscillator the effective capacitance in the equation of frequency calculation is equal to ___________

a) ᴨ/

b) 3 /

c) /ᴨ)

d) /

Answer: d

Explanation: In the tank circuit of Colpitts oscillator there are two capacitors connected in series and hence effective capacitance is /.

5. Which configuration of transistor amplifier is used for Colpitts oscillator?

a) Common emitter amplifier

b) Common collector amplifier

c) Common base amplifier

d) Combination of both common emitter and common collector

Answer: a

Explanation: Common emitter configuration is used for amplifying distorted oscillatory signal to a perfect oscillation. The transistor provides a 180° phase shift and tank circuit another 180°, a total of 0 phase shift.

6. Phase shift provided by overall tank circuit is ___________

a) 0 degree

b) 90 degree

c) 180 degree

d) -90 degree

Answer: c

Explanation: The overall phase shift provided by tank circuit is 180 degrees. Since the active element produces a phase shift of 180 degrees the tank circuit should create 180 degrees to obey Barkhausen’s criteria.

7. The gain device in the colpitts oscillator act as a ___________

a) Low pass filter

b) High pass filter

c) Band pass filter

d) Band rejection filter

Answer: c

Explanation: The gain device in Colpitts oscillator act as a band pass filter and thus limits frequency of oscillation to a certain range.

8. Which of the following equation gives amplitude of oscillation in Colpitts oscillator using the describing function method? Misplaced &

a) 2I C R L /C1+C2

b) 2I C C2/C1+C2

c) 2I C R L C2/C1

d) 2I C R L C2/C1+C2

Answer: d

Explanation: Amplitude of oscillation in Colpitts oscillator using describing function method is egual to

V=(2I C R L C2)/C1.

9. The improvement of Colpitts oscillator over Hately oscillator is, Colpitts oscillator’s performance in ___________

a) All frequency region

b) Mid frequency region

c) High frequency region

d) Low frequency region

Answer: c

Explanation: Colpitts oscillator shows better frequency stability in high frequencies than Hartley oscillator.

10. Colpitts oscillator provides more performance than Hartley oscillator because of its ________ elements.

a) Capacitive

b) Resistive

c) Inductive

d) Active

Answer: a

Explanation: Colpitts oscillator provides more performance than Hartley oscillator because of its capacitive feedback elements. Due to less self and mutual inductance in the circuit, frequency stability of the oscillator is improved along with a more simple design.

This set of Analog Circuits Interview Questions and Answers for Experienced people focuses on “Crystal Oscillator-1”.

1. Which of the following are not the characteristics of a crystal oscillator?

a) Highly stable with time

b) Highly stable with temperature

c) Highly selective

d) Frequency depends external resistors and capacitors

Answer: d

Explanation: The crystal oscillator is highly stable with time, highly stable with temperature, highly selective. The frequency of crystal is a constant regardless of output circuits. The frequency is dependent on the crystal shape which does not differ much at all.

2. Equivalent circuit of crystal oscillator contains ______________

a) Two inductors and two capacitors

b) One inductors and two capacitors

c) Two inductors and one capacitors

d) One inductors and one capacitors

Answer: b

Explanation: There is one inductor in series with a resistor and a capacitor, which are all in parallel to a second capacitor. The whole setup acts like a crystal oscillator and the values of these components determine the resonant frequency.

3. The parallel capacitance in the equivalent circuit of crystal oscillator represents __________

a) Inter electrode capacitance

b) Compliance

c) Viscous factor

d) Mass

Answer: a

Explanation: The parallel capacitor of the equivalent circuit of crystal oscillator constitute for electrostatic capacitance between two parallel plates of crystal. That is, it is inter electrode capacitance. It represents the capacitance formed due to mechanical moulding of the crystal.

4. The inductance in the equivalent circuit of crystal oscillator represents __________

a) Inter electrode capacitance

b) Compliance

c) Viscous factor

d) Mass

Answer: d

Explanation: Inductance of the crystal oscillator physically refer to mass of the oscillator.

5. The series capacitance in the equivalent circuit of crystal oscillator represents __________

a) Inter electrode capacitance

b) Compliance

c) Viscous factor

d) Mass

Answer: b

Explanation: The series capacitance of the oscillator physically represents the compliance of the oscillator.

6. The resistance in the equivalent circuit of crystal oscillator represents __________

a) Inter electrode capacitance

b) Compliance

c) Viscous factor

d) Mass

Answer: c

Explanation: The resistance in the equivalent circuit represents the friction of the crystal’s internal structure, or we can say the viscous factor of the crystal.

7. When frequency of oscillation of a crystal oscillator becomes parallel resonance frequency reactance of crystal oscillator becomes __________

a) Zero

b) Infinity

c) Unpredictable

d) Unity

Answer: b

Explanation: The oscillator has two resonant frequencies, parallel and series. Parallel resonance occurs when the reactance of series leg becomes equal to that of the parallel capacitor, and during this time, impedance offered is very high, almost infinite.

8. When frequency of oscillation of circuit is less than series resonance frequency wS crystal oscillator act as __________

a) Inductor

b) Capacitor

c) Resistor

d) Transistor

Answer: b

Explanation: When the frequency of oscillation of crystal becomes less than that of wS the oscillator becomes capacitive and in between wS and wP it becomes inductive.

9. The reactance of crystal oscillator will be inductive if oscillator operating frequency is __________

a) Greater than parallel resonance frequency

b) Less than series resonance frequency

c) In between parallel resonance frequency and series resonance frequency

d) Greater than series resonance frequency

Answer: c

Explanation: When the frequency of oscillation of crystal becomes less than that of wS the oscillator becomes capacitive and in between wS and wP it becomes inductive.

10. The crystal can be used to replace inductor in __________

a) RC phaseshift oscillator oscillator

b) Colpitts oscillator

c) Clapp oscillator

d) Weinbridge oscillator

Answer: b

Explanation: Crystal oscillator operating between wS and wP is inductive and hence we can replace it with inductor in colpitts oscillator.

This set of Analog Circuits Question Bank focuses on “Crystal Oscillator-2”.

1. Which of the following effect illustrate the basic working of a quartz crystal oscillator?

a) Photovoltaic effect

b) Piezo electric effect

c) Electro-magnetic effect

d) Electron excitation effect

Answer: b

Explanation: When a voltage source is applied to a quartz crystal, it begins to produce a characteristic known as the Piezo electric effect. It is a property of a crystal by which an electrical charge produces a mechanical force by changing the shape of the crystal and vice versa, a mechanical force applied to the crystal produces an electrical charge.

2. Compared to ceramic oscillator crystal oscillators are ___________

a) Less reliable

b) Less costly

c) More accurate

d) They are same

Answer: c

Explanation: Quartz oscillators are able to oscillate with desired frequency, with little needed power to operate it. The frequency is stable for a wide range of temperature with minimal frequency change around 0.001% while the same is 0.5% for a ceramic oscillator. The phenomenon of operation is almost the same though.

3. For critical application quartz oscillator is usually contained in container called ___________

a) Crystal oven

b) Crystal case

c) Silicon container

d) Crystal container

Answer: a

Explanation: For critical applications, the quartz oscillator is mounted in a temperature-controlled container. It is called a crystal oven, and can also be mounted on shock absorbers to prevent perturbation.

4. Crystal frequency characteristics depends on ___________

a) Inductive reactance connected to crystal

b) Capacitive reactance connected to crystal

c) Shape of crystal

d) All of the mentioned

Answer: c

Explanation: The crystal frequency will only depend on internal characteristics of the crystal and hence it depends on shape or ’cut’ of the crystal.

5. The crystal resonator frequency will change according to operating time, this phenomenon is termed as ___________

a) Magnus effect

b) Retrace

c) Aging

d) Moore’s effect

Answer: c

Explanation: Aging is the long term frequency drift of an oscillator. It occurs due to its operation circumstances and duration of power off storage. Contamination of the mass of the crystal affects the aging, as well as excess mechanical stress on the crystal over time.

6. The frequency variation error occurred when crystal is re-powered after several hours is termed as ___________

a) Magnus effect

b) Retrace

c) Aging

d) Moore’s effect

Answer: b

Explanation: When power is removed from an oscillator for several hours, then re-applied on it again, the frequency of this oscillator will stabilize at a slightly different value. This frequency variation error is called retrace error.

7. Measure of sensitivity of crystal oscillator output frequency to supply voltage is called ___________

a) Frequency pulling

b) Frequency ratio

c) Output ratio

d) Frequency pushing

Answer: d

Explanation: Every oscillator needs a supply and the operating frequency is dependent on that voltage. As the DC supply changes, the output frequency may also change and this is called frequency pushing. Frequency pulling is the change in output frequency due to change in applied load.

8. The measure of frequency change due to non- ideal load is called ____________

a) Frequency pulling

b) Frequency ratio

c) Output ratio

d) Frequency pushing

Answer: a

Explanation: The measure of frequency change due to non- ideal load is called frequency pulling.

9. Which of the following parameter refer to maximum available tuning voltage to the required tuning-frequency range?

a) Oscillator turning port noise

b) Oscillator reference noise

c) Power supply noise

d) Vibration induced noise

Answer: a

Explanation: maximum available tuning voltage to the required tuning-frequency range

Is indicated by Oscillator turning port noise.

10. Which of the following noise is caused due to sensitivity to an acceleration of crystal?

a) Oscillator reference noise

b) Oscillator turning port noise

c) Power supply noise

d) Vibration induced noise

Answer: d

Explanation: Quartz crystal oscillator frequency changes slightly when accelerated. This means that random and periodic mechanical vibrations in the device can cause significant phase noise in the output

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Clapp Oscillator”.

1. Clapp oscillator is an ___________

a) LC oscillator

b) RC oscillator

c) RL oscillator

d) Crystal oscillator

Answer: a

Explanation: Clapp oscillator is a colpitts oscillator which has an extra capacitor series with an inductor. Hence it is an LC oscillator, with 3 capacitors and one single inductor to set its frequency, and the clap circuit is often used as a variable frequency oscillator, by making one capacitor variable.

2. Which type of feedback is used in clapp oscillator?

a) Positive feedback

b) Negative feedback

c) No feedback is used

d) Both positive and negative feedback

Answer: a

Explanation: Positive feedback is present in the clap oscillator, where in the three capacitors form a voltage divider which determines amount of feedback being applied to transistor input.

3. When constructing variable frequency oscillator among clapp oscillator and colpitts oscillator which one is preferred?

a) Colpitts oscillator

b) Clapp oscillator

c) Both of them have equal preference

d) None of them preffered

Answer: b

Explanation: The stray third capacitor in the clap oscillator doesn’t have a negative effect and the frequency obtained is instead more stable and accurate than colpitt oscillator, hence the clap oscillator is preferred for a variable frequency oscillator.

4. In clapp oscillator voltage is divided by using __________

a) Resistors

b) Capacitors

c) Inductors

d) Voltage dividing circuits are not used

Answer: b

Explanation: In clap capacitor voltage divider circuit is achieved by capacitor because it is a modified version of colpitts oscillator.

5. In a clapp oscillator with three capacitor C 1 , C 2 , C 3 , C 1 is used as upper capacitor in voltage divider, C 2 is used as lower capacitor in voltage divider and C 3 is the third capacitor. For perfect operation which of these capacitor should have minimum value?

a) C 1

b) C 2

c) C 3

d) All of them are equal

Answer: c

Explanation: In a Clapp oscillator C 3 is much smaller than C 1 and C 2as a result, the equivalent capacitance C is approximately equal to C 3 . For perfect operation C 3 should have minimum value.

6. In a clapp oscillator with three capacitor C 1 , C 2 , C 3 , C 1 is used as upper capacitor in voltage divider, C 2 is used as lower capacitor in voltage divider and C 3 is the third capacitor. The frequency of operation will be close to (Assume C 1 parallel C 2 is C 3 ).

a) analog-circuits-questions-answers-clapp-oscillator-q6a

b) analog-circuits-questions-answers-clapp-oscillator-q6b

c) analog-circuits-questions-answers-clapp-oscillator-q6c

d) analog-circuits-questions-answers-clapp-oscillator-q6d

Answer: c

Explanation: Since equivalent capacitance is close to C 3 and equation is similar to colpitts oscillator.

7. In a clapp oscillator with three capacitor C 1 , C 2 , C 3 , C 1 is used as upper capacitor in voltage divider, C 2 is used as lower capacitor in voltage divider and C 3 is the third capacitor. For perfect operation of clapp oscillator value of C 3 should be __________

a) Equal to C 1

b) Equal to C 2

c) Equal to C 1 parallel C 2

d) Very small

Answer: c

Explanation: For perfect operation of clapp oscillator value of C 3 should be C 1 parallel C 2 .

8. In a clapp oscillator with three capacitor C 1 , C 2 , C 3 , C 1 is used as upper capacitor in voltage divider, C 2 is used as lower capacitor in voltage divider and C 3 is the third capacitor. Inductance used in the circuit is L. The frequency of operation will be __________

a) analog-circuits-questions-answers-clapp-oscillator-q7

b) analog-circuits-questions-answers-clapp-oscillator-q8

c) analog-circuits-questions-answers-clapp-oscillator-q8b

d) analog-circuits-questions-answers-clapp-oscillator-q8a

Answer: a

Explanation: The frequency of operation is given analog-circuits-questions-answers-clapp-oscillator-q8c . Here effective capacitance is equal to C parallel C 2 parallel C 3 .

9. In the following oscillator which one is more accurate?

a) Colpitts oscillator

b) Clapp oscillator

c) Hartley oscillator

d) Simple LC oscillator

Answer: b

Explanation: The stray third capacitor in the clap oscillator doesn’t have a negative effect and the frequency obtained is instead more stable and accurate than colpitt oscillator.

10. What will be the clapp oscillator frequency if the C 1 , C 2 , C 3 of clap oscillator is 1μF, 1μF, 2μF respectively and inductance is 1μH?

a) 0.1MHz

b) 0.4MHz

c) 1MHz

d) 4MHz

Answer: b

Explanation: Frequency of clap oscillator is analog-circuits-questions-answers-clapp-oscillator-q7 = 3.9 x 10 5 ie approximately 0.4MHz.

Therefore, frequency is equal to analog-circuits-questions-answers-clapp-oscillator-q10 .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Characteristics of JFET”.

1. JFET is a ______ carrier device.

a) Unipolar

b) Bipolar

c) Minority

d) Majority

Answer: d

Explanation: The current flow in the device is due to majority carriers. In an n-type JFET, it is due to the electrons and in a p-type JFET- it is due to the holes.

2. The n-channel JFET, the pinch off voltage is ______________

a) not greater than 0

b) greater than or equal to 0

c) less than or equal to 0

d) not less than 0

Answer: a

Explanation: The pinch off voltage for an N-channel JFET is negative. The depletion region would extend into the N-channel if the reverse bias in the gate to source voltage increases which means that the gate to source voltage has to be negative since the gate is N-type.

3. The built-in barrier potential in a N-channel JFET is ___________

a) less than the internal pinch-off voltage

b) equal to the internal pinch-off voltage

c) greater than the internal pinch-off voltage

d) not related to the internal pinch-off voltage

Answer: a

Explanation: Pinch-off would require more voltage than the voltage required to establish the p-n barrier voltage. This is evident from the dependence of such voltage on the doping concentration.

4. If channel thickness increases, the internal pinch-off voltage ___________

a) Decreases

b) Increases

c) Remains the same

d) Increases logarithmically

Answer: b

Explanation: The internal pinch off voltage is directly proportional to the channel thickness. If the channel thickness increases, the pinch off voltage increases.

5. If the doping concentration of the gate increases, the internal pinch-off voltage ___________

a) Increases logarithmically

b) Increases linearly

c) Increases exponentially

d) Decreases linearly

Answer: b

Explanation: The internal pinch-off voltage is linearly proportional to the doping concentration. Hence, it would increase with the increase in the doping concentration. The built-in-barrier potential is logarithmically proportional to the doping concentration of the gate.

6. The cut-off frequency of a JFET is that time when the magnitude of the input current is ___________

a) Greater than the output current

b) Less than the output current

c) Equal to the output current

d) Twice the output current

Answer: c

Explanation: The cut-off frequency is an important feature of the JFET due to the present of capacitive effects. It has been seen that the output current becomes a function of frequency in high-frequency applications and hence we have to choose a cut-off frequency so that the output current is equal to the input current.

7. The cut-off frequency of a JFET is ___________

a) linearly related to the transconductance of the JFET

b) inversely proportional to the transconductance of the JFET

c) exponentially related to the transconductance of the JFET

d) logarithmically related to the transconductance of the JFET

Answer: a

Explanation: The cut-off frequency is seen to be linearly related to the transconductance of the JFET. This is typically due to the reactance of the capacitors.

8. How is the transconductance at saturation related to the pinch off voltage of the JFET?

a) Inversely proportional

b) Directly proportional

c) Inverse-squarely related

d) Directly and proportional to square of the pinch-off voltage

Answer: a

Explanation: The transconductance is seen to be inversely related to the pinch of voltage. The transconductance is seen to be inversely related to the channel length while the pinch off voltage is directly proportional to the channel length.

9. When an N-channel JFET reaches pinch-off, the increase in the drain to source voltage results in shifting of the pinch-off position towards the ___________

a) Gate

b) Drain

c) Source

d) Does not shift

Answer: c

Explanation: Pinch off is said to be reached if the drain to source voltage is equal to the difference between the gate to source and the threshold voltage. So, this pinch off happens at a certain distance from the source and the gradual decrease in the channel length will happen faster if the voltage along the channel length increases faster. It can be readily observed that equality is reached at a distance less than the previous case and hence the pinch-off is shifted towards the source.

10. An N-channel JFET is ___________

a) Always ON

b) Always OFF

c) Enhancement mode JFET

d) Has a p-type substrate

Answer: a

Explanation: An N-channel is always ON depletion mode JFET since the channel for current flow from source to drain is always present. This is in contrast to a P-channel JFET which needs to be provided with a channel for the flow of current.

11. A P-channel JFET is___________

a) Always ON

b) Always OFF

c) Depletion mode JFET

d) Has an n-type substrate

Answer: b

Explanation: The P-channel JFET doesn’t have a built-in channel for the flow of current. This is because the conduction in a P-channel JFET can begin after a certain voltage is applied at the gate which would lead to widening the channel between the source and the drain.

12. How is the metallurgical channel thickness between the gate and the substrate related to the doping concentration of the channel?

a) Inversely proportional to the square root of the doping concentration

b) Logarithmically related to the square root of the doping concentration

c) Directly proportional to the square root of the doping concentration

d) Exponentially related to the square root of the doping concentration

Answer: a

Explanation: The channel thickness is inversely related to the square root of the doping concentration of the channel. This is because the electric field developed is proportional to the channel doping concentration while the relation between the potential, electric field and doping concentration is visible from the Poisson’s equation.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Biasing of JFET and MOSFET”.

1. Which of the following statements are true?

P: JFET is biased to operate it in active region

Q: MOSFET is biased to operate it in saturation region

a) Both P and Q are correct

b) P is correct and Q is incorrect

c) P is incorrect and Q is correct

d) Both P and Q are incorrect

Answer: c

Explanation: While transistors are biased to work in the active region, to act as amplifiers, FET devices are instead biased in the saturation region to work as an amplifier, whether it be a JFET or a MOSFET. In saturation, current I DS changes with respect to V GS , and small changes in V GS cause proportionate changes in I DS , and the device can act as an amplifier.

2. In the given situation for n-channel JFET, we get drain-to-source current is 5mA. What is the current when V GS = – 6V?

analog-circuits-questions-answers-biasing-jfet-mosfet-q2

a) 5 mA

b) 0.5A

c) 0.125 A

d) 0.5A

Answer: c

Explanation: I DS = I DSS (1-V GS /V P ) 2

When V GS = 0, I DSS = I DS = 5mA

When V GS = -6V, I DS = 5mA 2

I DS = 5 x 25 = 125 mA.

3. Consider the following circuit. Given that V DD = 15V, V P = 2V, and I DS = 3mA, to bias the circuit properly, select the proper statement.

analog-circuits-questions-answers-biasing-jfet-mosfet-q3

a) R D < 6kΩ

b) R D > 6kΩ

c) R D > 4kΩ

d) R D < 4kΩ

Answer: a

Explanation: In given circuit, V GS = -5V

V DS = V DD – I DS R D

To bias properly V DS > |V P | – |V GS |

V DS > -3

15 – 3mA*R D > -3

-3mA*R D > -18

R D < 6kΩ.

4. Consider the circuit shown. V DS =3 V. If I DS =2mA, find V DD to bias circuit.

analog-circuits-questions-answers-biasing-jfet-mosfet-q4

a) -30V

b) 30V

c) 33V

d) Any value of voltage less than 12 V

Answer: c

Explanation: V DS = V DD – I DS

3 = V DD – 2

3 = V DD – 30

V DD = 33 V.

5. To bias a e-MOSFET ___________

a) we can use either gate bias or a voltage divider bias circuit

b) we can use either gate bias or a self bias circuit

c) we can use either self bias or a voltage divider bias circuit

d) we can use any type of bias circuit

Answer: a

Explanation: To bias an e-MOSFET, we cannot use a self bias circuit because the gate to source voltage for such a circuit is zero. Thus, no channel is formed and without the channel, the MOSFET doesn’t work properly. If self bias circuit is used, then D-MOSFET can be operated in depletion mode.

6. Consider the following circuit. Process transconductance parameter = 0.50 mA/V 2 , W/L=1, Threshold voltage = 3V, V DD = 20V. Find the operating point of circuit.

analog-circuits-questions-answers-biasing-jfet-mosfet-q6

a) 20V, 25mA

b) 13V, 22mA

c) 12.72V, 23.61mA

d) 20V, 23.61mA

Answer: c

Explanation: I DS = [k’W/L(V GS – V T ) 2 ]/2

V GS = 20 x 35/55 = 12.72 V

I DS = 0.25 2

I DS = 23.61 mA.

7. Given V DD = 25V, V P = -3V. When V GS = -3V, I DS = 10mA. Find the operating point of the circuit.

analog-circuits-questions-answers-biasing-jfet-mosfet-q7

a) -3.83V, 0.766mA

b) -2.345V, 0.469mA

c) 3.83V, 0.469mA

d) 2.3V, 0.7mA

Answer: b

Explanation: When V GS = V P then I DSS = I DS = 10mA

Also, in above circuit, V GS = -I DS R S = – I DS x5k

Thus, I DS = I DSS (1-V GS /V P ) 2

Solving we get, I DS = 0.766mA, 0.469mA

Thus we get V GS = -3.83V, -2.345V

However, V GS should lie between 0 and V P .

8. Consider the following circuit. I DSS = 2mA, V DD = 30V. Find R, given that V P = – 2V.

analog-circuits-questions-answers-biasing-jfet-mosfet-q8

a) 10kΩ

b) 4kΩ

c) 2kΩ

d) 5kΩ

Answer: b

Explanation: I DSS = 2mA

I DS = (V DD – 15)/50k = 0.3mA

V GS = V P [1 – \(\sqrt{\frac{I_{DS}}{D_{SS}}}\)]

V GS = -2 x = – 1.22V

Thus, V GS + I DS x = 0

R = 1.22/0.3mA = 4kΩ.

9. Which of the following statements are true?

A: In a self bias circuit, the current IDS is not stable.

B: Source capacitance, CS, parallel to RS, reduces stability.

a) Both statements are correct and B is the correct reasoning

b) Both statements are correct but B is not the correct reason for it

c) Statement A is correct while statement B is wrong

d) Both statements are incorrect

Answer: d

Explanation: In a self bias circuit, the current I DS is stable due to the presence of source resistance R S in the circuit. The source resistance helps provide negative feedback to keep current stable. Capacitor C S is a bypass capacitor to prevent decrease in voltage gain.

10. For a MOSFET, the pinch-off voltage is -3V. Gate to source voltage is 20V. W/L ratio is 5. Process transconductance parameter is 40μA/V 2 . Find drain to source current in saturation.

a) 0.10 mA

b) 0.05mA

c) – 0.05mA

d) – 50A

Answer: c

Explanation: I SD = k’W(V SG – |V T |) 2 /2L

I SD = 20*5* 2 = 52900μA = 0.05mA.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “JFET Amplifier”.

1. What are the small signal FET parameters?

a) g m and r ds

b) g m and V gs

c) V ds and r ds

d) g m

Answer: a

Explanation: The small signal model of FET- MOSFET and JFET is obtained from the following equation I DS = g m V gs + V ds /r ds

g m and r ds are the small signal FET parameters.

2. Find the transconductance when applied gate to source voltage is -2V.

analog-circuits-questions-answers-jfet-amplifier-q2

a) 10 Ω -1

b) 10mΩ -1

c) 40mΩ -1

d) 20mΩ -1

Answer: b

Explanation: V P = -4V

g m = g mo (1 – V GS /V P ) = 20 = 20/2 = 10mΩ -1 .

3. Choose the incorrect statement for JFET.

a) Maximum transconductance occurs at V GS =0

b) Transconductance decreases linearly with V GS

c) Transconductance increases linearly with I DS

d) Transconductance does not depend on V DS

Answer: c

Explanation: Maximum transconductance occurs at V GS = 0, and it lies between 0-g mo . Transconductance decreases linearly with V GS according to equation g m = g mo (1-V GS /V P ). However, g m ∝ \(\sqrt{I_{DS}}\), which is a parabolic increase, not linear.

4. Consider the circuit shown below.

analog-circuits-questions-answers-jfet-amplifier-q4

Find the net output resistance given that g m = 1mΩ -1 and r ds = 0.1 MΩ.

a) 10 kΩ

b) 9.09 kΩ

c) 100 kΩ

d) 110 kΩ

Answer: b

Explanation: Net output resistance for the circuit is R = r ds ||R D = 100k||10k

R = 9.09 kΩ.

5. For an RC coupled common source JFET amplifier without bypass capacitor, find the voltage gain if g m = 1mΩ -1 , source resistance is 2kΩ, drain resistance is 15kΩ and load is 10kΩ.

a) -2

b) -2.5

c) 5

d) 2

Answer: a

Explanation: A V = -g m R L ’/1+g m R S

R L ’= 15k|| 10k = 6kΩ

A V = – 2.

6. Consider the amplifier below.

analog-circuits-questions-answers-jfet-amplifier-q6

Find the input resistance and voltage gain of the circuit, given g m = 0.5mΩ -1 and r ds = 0.2MΩ.

a) R I = 27.27 kΩ, A V = 5

b) R I = 44 kΩ, A V = 1

c) R I = 27.27kΩ, A V = 1

d) R I = 60kΩ, A V = 100

Answer: c

Explanation: The given circuit is a common drain JFET amplifier.

Its input resistance, R I = R G = 60k||50k = 27.27 kΩ

The voltage gain is 1.

7. Which of these is incorrect for a common gate amplifier?

a) It is a current buffer

b) It has ∞ output resistance

c) Its input resistance is high

d) It is used as a high-frequency amplifier

Answer: c

Explanation: A common gate amplifier can be used as a current buffer since its current gain is 1. It has very high output resistance and low input resistance. It is often used as a high-frequency amplifier.

8. In a high-frequency model of a JFET, which of these capacitances is present?

A: Gate-to-source capacitance

B: Gate-to-drain capacitance

C: Drain-to-source capacitance

a) A and B

b) A and C

c) B and C

d) A, B and C

Answer: d

Explanation: In an HF model of a JFET, C GS and C GD are present, in the range of 1pF to 10 pF. C DS is the internal capacitance of the channel, ranging from 0.1pF to 1pF.

9. Which of these is false for a CS amplifier without a bypass capacitor compared to a CS amplifier with a bypass capacitor?

a) Voltage gain magnitude decreases

b) Input resistance remains same

c) The output resistance decreases

d) The output is 180° out of phase with respect to the input applied

Answer: c

Explanation: For a CS amplifier without a bypass capacitor, the input resistance is unchanged and output resistance increase.

R I = R G for both.

R O = r ds with bypass capacitor and r ds = r ds + R S without a bypass capacitor.

Output is still 180° out of phase compared to applied input, but the gain decreases.

10. Which of these has an output which follows input?

a) CS amplifier with a bypass capacitor

b) CD amplifier

c) CG amplifier

d) CS amplifier without a bypass capacitor

Answer: b

Explanation: For a CD amplifier, the gain A V = g m (R S ||r ds )/1+g m (R S ||r ds )

But since g m (R S ||r ds )>>1, gain A V ≈1, that is, it acts as a voltage follower. It is also called a source follower.

11. In a CS amplifier, given that r ds =0.5MΩ and g m =5mΩ -1 , the load is 10kΩ, source resistance is 44 kΩ. Calculate the internal amplification factor for the small signal model.

a) 2500

b) 8100

c) 9800

d) 7700

Answer: a

Explanation: When the current source in small signal mode, g m V GS is converted into a voltage source, the source is equal to μV GS where μ=gmrds is the amplification factor of the circuit.

Hence, amplification factor = 2500.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “MOSFET Amplifier with CD Configuration – 1”.

1. If channel length modulation is present, what is the voltage gain?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q1

a) r o1 / {(1/g m1 || r o2 ) + r o1 }

b) r o2 / (1/g m1 + r o1 )

c) r o2 / (1/g m1 + 3r o2 )

d) r o2 / (2/g m1 + r o2 )

Answer: a

Explanation: M 2 behaves as a Source follower i.e. it is being used in a C.D. configuration. M 1 provides a output resistance of ro1 but M 2 provides an impedance of (1/g m2 ||r o2 ). Thus, from the voltage gain of a follower stage, we conclude the overall voltage gain is r o1 / {(1/g m1 || r o2 ) + r o1 }.

2. If channel length modulation is present, what is the impedance looking into node X?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q2

a) (1/g m2 || r o2 || 1/g m1 )

b) (1/g m2 || 1/g m1 || r o1 )

c) (1/g m2 || r o2 || 12/g m1 || r o1 )

d) (1/g m2 || r o2 || 1/g m1 || r o1 )

Answer: d

Explanation: The source of M 1 and M 2 are connected at node X. The impedance looking into the source of a MOSFET is (1/g m || r o ). If we look at node X, M 1 and M 2 are connected from Node X to ground. Hence, they are parallel to each other and the overall impedance becomes (1/g m2 || r o2 || 1/g m1 || r o1 ).

3. If channel length modulation is present in M1 but not in M2, what is the voltage gain at node X?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q2

a) (1/g m2 || r o2 ) / {1/g m2 + ( 1/g m1 || r o1 )}

b) (1/g m1 || r o1 ) / (1/g m2 + r o1 )

c) 1/g m1 / (1/g m2 + 1/g m1 )

d) 1/g m1 / {1/g m2 + (1/g m1 || r o1 )}

Answer: a

Explanation: The voltage gain at node X is due to M 1 being used in the CD configuration. Since M 1 offers channel length modulation but not M 2 , we note that the impedance looking into the source of M 2 is 1/g m2 but for M 1 , it’s (1/g m2 || r o2 ). From the voltage gain of a follower stage, we conclude that the voltage gain is (1/g m2 || r o2 ) / {1/g m1 + ( 1/g m1 || r o1 )}.

4. The follower stage provides _____ input impedance.

a) low

b) equal

c) very high

d) very low

Answer: c

Explanation: The input to the follower stage is applied to the gate of the MOSFET. The gate of the MOSFET is made of Si0 2 , which is a dielectric and provides very high impedance to the input.

5. The output impedance of the follower is _____________

a) Low

b) Very low

c) Depends on it’s transconductance and low

d) High

Answer: c

Explanation: The output impedance of the follower is a function of the transconductance. But it’s also a function of the channel length modulation. But the resistance offered due to channel length modulation is much greater than the inverse of the transconductance. It can be concluded that the output of the follower depends on the transconductance and it’s low.

6. The follower stage is mostly used as a ____________

a) Current source

b) Buffer stage

c) Amplifier

d) Switch

Answer: b

Explanation: The C.D. configuration offers high input impedance to the input signal and low output impedance while sensing the output signal. Thus, it is used as a buffer stage.

7. Assume µ n C ox = 100 µA/V 2 and supply current is 5mA, what should be the aspect ratio so that a 50 Ω load can be used to give a voltage gain of .25 in C.D. configuration?

a) 32.6

b) 50

c) 40

d) 41

Answer: a

Explanation: The voltage gain is given by R L /(1/g m + R L ) where R L is the 50 Ω load. Now, we see that if the voltage gain is .25, gm is 1/175. Now, gm is \µ is the aspect ratio, Id is the drain current. We have all the values and the aspect ratio becomes 32.6.

8. If maximum power is transferred to the load R1, the transconductance is .02 and channel length modulation is neglected, what should be the value of the load?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q8

a) 50 Ω

b) 32 Ω

c) 16 Ω

d) 10 Ω

Answer: a

Explanation: Since the transconductance is .02, it’s inverse is 50. From the general expression of voltage gain of a source follower, we conclude that the load should be 50 Ω since the inverse of the transconductance is the impedance looking into the source of the MOSFET. For maximum power transfer, we have to match both the impedance.

9. If g is the transconductance and r is the resistance due to channel length modulation – what is the total voltage gain if only M 1 has channel length modulation?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q9

a) R / + R) * g *R * R /

b) R / + R) * g *R * R * g

c) R / ) * g *R * R /

d) R / + R) * g *R * R /

Answer: a

Explanation: This is a cascade of a follower stage follower by a CS stage which precedes another follower stage. The gain due to each stage gets multiplied until we reach the output. For the first stage, the gain is R/ + R) since M 1 has channel length modulation. The second stage has a gain of g * R while the final stage has a gain of R/ . After multiplying the gains, we get R/ + R) * g *R * R/ .

10. If g is the transconductance and r is the resistance due to channel length modulation – what is the total voltage gain if both M 2 and M 3 has channel length modulation?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q9

a) R/ + R) * g * * R * g

b) R/ * g * * R/ + R)

c) R/ ) * g *R * R/ + R)

d) R/ + R) * g *R * R *2g

Answer: b

Explanation: This is a cascade of a follower stage follower by a CS stage which precedes another follower stage. The gain due to each stage gets multiplied until we reach the output. For the first stage, the gain is R / . The second stage has a gain of g * while the final stage has a gain of R/ + R)- the effect of r is simply due to channel length modulation. After multiplying the gains, we get R/ * g * * R/ + R).

11. If g is the transconductance and r is the resistance due to channel length modulation – what is the total voltage gain if both M 1 and M 3 has channel length modulation?

analog-circuits-questions-answers-mosfet-amplifier-cd-configuration-1-q9

a) R / + R) * g * R * R / )

b) R / * g * R / + 3R)

c) R / ) * g *R * R / + 2R)

d) R / * R * R * g * 4g

Answer: a

Explanation: This is a cascade of a follower stage follower by a CS stage which precedes another follower stage. The gain due to each stage gets multiplied until we reach the output. For the first stage, the gain is R/ + R). The second stage has a gain of g * R while the final stage has a gain of R/ + R). The presence of r is due to channel length modulation. After multiplying the gains, we get R/ + R) * g * R * R / ).

12. Neglecting Channel Length Modulation, if the transconductance of the MOSFET increases, the gain of the follower stage will _________

a) decreases

b) increases

c) doesn’t get affected

d) doubles

Answer: b

Explanation: The gain of the follower stage is given by R s /(1/g m + R s ). Hence, we readily conclude that if the transconductance (g m ) increases, the gain will increase.

13. Neglecting Channel Length Modulation, if the aspect ratio of the MOSFET increases, the gain of the follower stage will _________

a) increase

b) decrease

c) increases proportionately

d) doesn’t get affected

Answer: a

Explanation: The square root of the aspect ratio is directly proportional to the transconductance of the MOSFET. If it increases, the transconductance increases and hence according to the expression of the voltage gain of a follower stage gain increases.

14. Neglecting Channel Length Modulation, if the transconductance increases, the input impedance of a follower stage ___________

a) Remans the same

b) Increases

c) Decreases

d) Doubles

Answer: a

Explanation: The input impedance is extremely high for a follower stage because the input is applied to the gate of the MOSFET. The SiO 2 layer is the primary reason for such a high impedance value.

15. Neglecting Channel Length Modulation, if the transconductance of a MOSFET increases, the output impedance of the follower stage can _________

a) increase

b) decrease

c) increase linearly

d) decrease non-linearly

Answer: b

Explanation: The output impedance of a follower stage is (1/g m || R d ). If the transconductance increases, the output impedance will decrease, as can be seen from the formulae.

This set of Analog Circuits Questions and Answers for Entrance exams focuses on “MOSFET Amplifier with CD Configuration – 2”.

1. If g is the transconductance, r is the resistance due to channel length modulation and if M 2 has channel length modulation but M 1 doesn’t, what is the voltage gain at node x?

analog-circuits-questions-answers-entrance-exams-q1

a) / )

b) / )

c) / )

d) / )

Answer: a

Explanation: The voltage gai at node x will be due to the follower stage. Since M 2 has channel length modulation, we observe that the total resistance at the source of M 2 is . Thus, from the expression of voltage gain of a follower- the voltage gain at node x is / ).

2. If g is the transconductance, r is the resistance due to channel length modulation and if M 2 has channel length modulation but M 1 and M 3 doesn’t, what is the total resistance at the source of M 2 ?

analog-circuits-questions-answers-entrance-exams-q2

a) ||

b) ||

c) R ||

d) || 1/g

Answer: a

Explanation: The source of M 2 is connected to the source of M 1 . Since channel length modulation isn’t present in M 1 , the source of M 1 offers a resistance of 1/g. Again, we find the source of M 2 offers a resistance of due to channel length modulation. Therefore, we conclude that the total impedance at the source of M 2 is || .

3. If g is the transconductance, r is the resistance due to channel length modulation and if M 2 and M 1 has channel length modulation but M 3 doesn’t, what is the output resistance at the source of M 3 ?

analog-circuits-questions-answers-entrance-exams-q2

a) 1/g || R

b) 1/g || r + 1/g

c) 1/g || R + 1/g

d) 1/g || r + 2/g

Answer: a

Explanation: The output impedance of the final stage doesn’t get affected by the previous stages since the MOSFET offers infinite impedance at the Gate. Hence, it isolates each stage from the next stage- provided the input is applied to the gate. The output impedance is simply since 1/g is the impedance looking into the source of M 3 while R is connected in parallel to it.

4. If g is the transconductance, r is the resistance due to channel length modulation and if M2 and M1 has channel length modulation but M3 doesn’t, what is the total resistance at the drain of M2?

analog-circuits-questions-answers-entrance-exams-q2

a) {* R + R} || 2R

b) {* 3R + 2R} || R

c) {* + } || R

d) Infinite

Answer: c

Explanation: The drain of M2 offers a resistance of {* + due to channel length modulation and the degeneration resistance R || 1/g || r connected to the drain of M2. This comes in parallel to R connected to the source of M2. Hence the overall resistance becomes {* + .

5. If g is the transconductance, r is the resistance due to channel length modulation and if M2 and M1 has channel length modulation but M3 doesn’t, what is the total voltage gain for only M2?

analog-circuits-questions-answers-entrance-exams-q2

a) g * {* + } || R

b) g * {* R + R} || 4R

c) g * {* R + 3R} || 4R

d) g * {* R + R} || 4R

Answer: a

Explanation: The voltage gain for M2 will be due to a CG stage. M2 has channel length modulation and is degenerated by . Thus the output impedance rises to {* + } ||R and hence the gain for only M2 is g * {* + } || R.

6. If g is the transconductance, r is the resistance due to channel length modulation and if only M3 and M2 has channel length modulation, what is the total voltage gain?

analog-circuits-questions-answers-entrance-exams-q2

a) R/ g * {* R + R} || R * R / { + R

b) R/ * g * {* R + R} || R * { + R

c) R/ * g * {* R + R} || R * R / { + 3R

d) { / } * g * [{* + } ||R] * R / { + R

Answer: d

Explanation: This is a cascade of a follower stage preceding a CG stage which is followed by another CD stage. The voltage gain due to first stage is { / } since the source of M1 is connected to the source of M2 which offers a resistance of . The voltage gain of the next stage is due to the CG stage degenerated by } and the gain is g * [{* + } || R]. Finally, the last stage offers a voltage gain of R / { + R. After multiplying all these gains, we have the overall voltage gain as { / } * [g * {* + } ||R] * R / { + R.

7. Can the voltage gain of a follower stage be greater than 1?

a) Yes, by changing the transconductance

b) No

c) Yes, by changing the bias current

d) Yes, by changing the supply rail

Answer: b

Explanation: The voltage gain of the follower stage readily tells us that it can never be used as an amplifier. It can only be used as a buffer.

8. Can the voltage gain of a follower stage be equal to 1?

a) Yes, by increasing the transconductance

b) No

c) Yes, by modifying the bias voltage

d) Yes, by modifying the bias current

Answer: b

Explanation: From the expression of voltage gain, we find that if the voltage gain is 1, the transconductance has to be infinite which is practically impossible. However, we can reach a voltage gain of approximately equal to 1 but never equal to 1.

9. The output impedance of follower is less than that of a degenerated CS stage.

a) True

b) False

Answer: a

Explanation: The output impedance of a CS stage will increase highly due to degeneration. Hence, it’ll be always more than that of a follower.

10. The input impedance of the follower stage is ____________ than that of a CG stage.

a) greater

b) lesser

c) equal

d) cannot be compared

Answer: a

Explanation: The input to a follower stage is at the gate of the MOSFET while for a CG stage, it’s at the source of the MOSFET. Hence, the input impedance of a follower will be very much greater than that of a CG stage.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “MOSFET Amplifier with CS Configuration – 1”.

1. Neglecting Channel Length Modulation, what is the voltage gain from the gate to the drain of M1?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) g m * R 1

b) g m * 2R 1

c) g m * R 1 || R O

d) 3g m * R 1

Answer: a

Explanation: We construct the r π model and find that the voltage gain from the gate to the drain of the MOSFET is g m * R 1 . Since Channel Length Modulation is neglected, the voltage gain won’t be g m * R 1 || R O .

2. In the following C.S. stage shown below, what is the transconductance?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) \(\frac{1}{2}\)µ n C ox *(V 1 -V th )

b) 3µ n C ox *(V 1 -V th )

c) µ n C ox *(V 1 -V th )

d) 2µ n C ox *(V 1 -V th )

Answer: a

Explanation: The transconductance is the ratio of a small change in the output current due to a small change in the input voltage. By differentiating the equation relating the current to the input voltage of a MOSFET with respect to the input voltage, we’ll get \(\frac{1}{2}\)µ n C ox *(V 1 -V th ).

3. In the following C.S. stage shown below, what is the input impedance if channel length modulation is neglected?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) Infinite

b) Very high

c) Very low

d) Cannot be determined

Answer: a

Explanation: Ideally, the input impedance while looking into the gate of the MOSFET is infinite. This is because of the SiO2 layer which behaves as an insulator.

4. In the following C.S. stage shown below, what is the input impedance if λ>0?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) Infinite

b) 0

c) Very low

d) r o

Answer: a

Explanation: The input impedance of the C.S. stage, i.e. the impedance looking into the gate of M1 is always infinite. Hence, in presence of early effect, the input impedance remains infinite.

5. In the following C.S. stage shown below, what is the output impedance if λ>0?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) r o

b) 0

c) R 1

d) R 1 || r o

Answer: d

Explanation: To find the output impedance, we perform a small signal analysis with the help of our r π model. After placing every voltage source (V cc and V 1 ) to ground, we connect a simple voltage source at the drain node. Thereafter, the ratio of applied voltage to input current gives us the impedance looking into the drain which is r o . But this voltage will be applied in parallel to R1. Hence the total output impedance is R 1 || r o .

6. In the following C.S. stage shown below, what is the output impedance, if channel length modulation is neglected?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) 2r o

b) 5

c) R 1

d) 0

Answer: c

Explanation: If the early effect is neglected, r o –> ∞ and hence, the output impedance is only R 1 . This is inferred by performing the small signal analysis at the output node or the drain of the M1.

7. In the following C.S. stage shown below, what is the voltage gain from the gate to the drain of M1 if λ>0?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q1

a) g m * r o

b) g m * 2R 1

c) g m * R 1 ||r o

d) g m * R 1

Answer: c

Explanation: This is easily observable by performing a small signal analysis at the output of the C.S. stage. We need to turn off all voltage sources, Vcc mainly, and give a small input at the gate. Thereby, the voltage gain becomes g m * R 1 ||r o . The presence of early effect reduces the gain a bit and deviates M1 from its ideal characteristics.

8. If the output voltage is sensed at the collector, which of the following option perfectly describes the stage shown below?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q8

a) A degenerated C.S. stage

b) A C.S. stage

c) A shunted C.S. stage

d) An open C.S. stage

Answer: a

Explanation: The above shown stage is a degenerated CS stage. This stage is called so because the current source connected at the source of M 1 reduces the total gain of the CS stage. The current source provides a finite output impedance which is connected the source. Thereby, the overall gain decreases.

9. What is the overall input resistance of the CS stage shown below?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q8

a) R 3

b) R 3 || R 1

c) 2 * R 3

d) Infinite

Answer: a

Explanation: By performing a simple small signal analysis, we find that the input resistance is simply R 3 . The impedance is not infinite since we have a resistor between the gate and the input voltage.

10. If the output impedance of the current source is Ri, what is the output impedance of the CS stage shown below, if channel length modulation is neglected?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q8

a) (1 + g m * (R 1 || R 2 )) * R i + (R 1 || R 2 )

b) {R 1 * (R 2 + r o )} || R i

c) R 1 || R 2

d) 0

Answer: a

Explanation: We calculate the output impedance by shorting the two voltage sources to ground. Thereafter, as we apply a simple step input at the output node, i.e. the collector node, we’ll find that the total impedance at connected to the drain of M1 is nothing but (1 + g m * (R 1 || R 2 )) * R i + (R 1 || R 2 ) where g m is the transconductance of M 1 , R 1 || R 2 is the total resistance connected at the drain and R i is the total resistance connected at the source. The output impedance would’ve been R 1 || R 2 if the current source was absent.

11. If the transconductance of M 1 is 5S, voltage gain for the following degenerated CS stage is _____

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q11

a) 2.45

b) 1.25

c) 1.45

d) 2.25

Answer: b

Explanation: The voltage gain for a degenerated CS stage is \(\frac{-Rd}{

}\). Hence, after putting the values, we get 5/4 and hence the answer becomes 1.25. R d is the total resistance connected to the drain of the M 1 while R s is the total resistance connected to the source of the M 1 .

12. If both the MOSFET’s are identical, what is the voltage gain from V 1 to node S?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q12

a) V cc – 2R 1 * µ n C ox * * (V 1 -V th ) 2

b) V cc R 1 * \(\frac{1}{2}\)µ n C ox * (V 1 -V th ) 2

c) V cc – R 1 * µ n C ox * (V 1 -V th ) 2

d) V cc – 4R 1 * \(\frac{1}{2}\)µ n C ox * * (V 1 -V th ) 2

Answer: c

Explanation: Since M 1 and M 2 receive the same bias voltage V 1 , the current generated by both the MOSFET’s are same i.e. \(\frac{1}{2}\)µ n C ox * (V 1 -V th ) 2 . Both the currents enter node S and hence the voltage at node S is V cc R 1 * \(\frac{1}{2}\)µ n C ox * (V 1 -V th ) 2 .

13. If both the MOSFET’s are identical and have channel length modulation, what is the output impedance at node S?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q12

a) R 1 || r o1 || r o2

b) R 1 + (r o1 || r o2 )

c) R 1 + (r o1 + r o2 )

d) R 1 || (r o1 + r o2 )

Answer: a

Explanation: If we perform a small signal analysis at node S, we will find that three resistors are connected from node S to ground. They are R 1 , and the resistances appearing between source and drain of the MOSFET’s due to channel length modulation ie r o1 and r o2 . Hence, the output resistance is R 1 || r o1 || r o2 .

14. If the internal resistance of the current source is finite, what will happen to the voltage gain. for the following C.S. stage, if K is doubled?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q14

a) The voltage gain reduces by 1/2

b) The voltage gain remains the same

c) The voltage gain increases

d) The voltage gain decreases

Answer: b

Explanation: The dependent current source has a variable resistance. If K doubles, the magnitude of current provided by the current source doubles, and thus, the total resistance connected to the source of M1 reduces by 2. By using the expression of voltage gain, \(\frac{-Rd}{

}\), we find that a decrease in Rs leads to an increase in the voltage gain.

15. If Channel Length Modulation is present and g m is the transconductance of M 1 , what happens to the output resistance of for a fixed V 2 in the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cs-configuration-1-q15

a) (1 + (g m * r o )) * R s + r o

b) (1 + (g m * r o )) * r o + R s

c) (r o + 2) * R s

d) (1 + (g m * r o )) * R s

Answer: a

Explanation: By performing a small signal analysis of the following circuit, we find that the output impedance of the circuit is simply (1 + (g m * r o )) * R s + r o . For doing this analysis, we have to short V 1 and V 2 to ground. Thereafter, we place a voltage source at the input node and measure current. The impedance measured will be the output impedance which is (1 + (g m * r o )) * R s + r o .

This set of Analog Circuits Questions and Answers for Aptitude test focuses on “MOSFET Amplifier with CS Configuration – 2”.

1. What is the input impedance of the following C.S. stage?

analog-circuits-questions-answers-aptitude-test-q2

a) R 2 || R 3

b) R 1 || (R 2 + R 3 )

c) (R 1 || R 2 ) + R 3

d) R 1 + (R 2 || R 3 )

Answer: a

Explanation: The input impedance can be calculated by performing a small signal analysis at the input side ie the Gate of M 1 . We need to set V cc and V 1 to 0 and place a voltage source at the node after R 1 . Henceforth we find that R 2 and R 3 are simply connected from the same node to ground so they are parallel to each other. Note that by input impedance of the C.S. stage, we refer to the impedance seen by the signal after it crosses R 1 .

2. Neglecting Channel Length Modulation, what is the output impedance of the following C.S. stage?

analog-circuits-questions-answers-aptitude-test-q2

a) R 4

b) R 4 || R 2

c) R 4 || (R 2 + R 3 )

d) R 4 || [(R 2 + R 3 ) || R 1 ]

Answer: a

Explanation: The output impedance is calculated by a simple small signal analysis. We set V cc and V 1 to 0 and place a voltage source at the output node. We find that only R 4 is the output impedance. Note that even if R 2 seems to be connected to R 4 , it doesn’t affect the output impedance since during small signal analysis, the node where R 2 and R 4 meets, is set to ground.

3. In the following C.S. stage, what is the gate voltage appearing across M 1 ?

analog-circuits-questions-answers-aptitude-test-q2

a) V 1 * [(R 2 || R 3 ) / (R 1 || R 2 || R 3 )]

b) V 1 * [(R 2 + R 3 ) / {R 1 + R 2 ) || R 3 }]

c) V 1 * [(R 2 + R 3 ) / (R 1 + R 2 + R 3 )]

d) V 1 * [(R 2 || R 3 ) / {R 1 + (R 2 ||R 3 }]

Answer: d

Explanation: The Thevenin resistance seen by the input voltage V 1 is R 1 + (R 2 || R 3 ). The Thevenin resistance is calculated by setting V cc to 0 and hence calculating the current entering the C.S. stage. After finding the Thevenin Resistance, it is found that the voltage drop across the gate of M1 is due to a potential divider between R1 and (R 2 || R 3 ) where the voltage across (R 2 || R 3 ) is truly the gate voltage. Hence, the total gate voltage V1 is attenuated and becomes V 1 * [(R 2 || R 3 ) / {R 1 + (R 2 ||R 3 }] .

4. If an NMOS is degenerated by a resistor in series with the source, what will happen to the output resistance?

a) It increases

b) It decreases

c) It remains same

d) Cannot be determined

Answer: a

Explanation: This is a fact derived by performing the small signal analysis of a degenerated C.S. stage. The output impedance increases if we degenerate the MOSFET and this further increases the linearity of operation.

5. If we have 3 resistors of 1k, 2k and 3k, how should they be used amongst R 1 , R 2 and R 3 to get the maximum gate voltage in the following C.S. stage?

analog-circuits-questions-answers-aptitude-test-q2

a) R 1 = 1k, R 2 = 2k, R 3 = 3k

b) R 1 = 3k, R 2 = 2k, R 3 = 1k

c) R 1 = 2k, R 2 = 1k, R 3 = 3k

d) R 1 = 3k, R 2 = 1k, R 3 = 2k

Answer: a

Explanation: The Thevenin resistance seen by V 1 is R 1 + (R 2 || R 3 ). The gate voltage is a result of V 1 going through a potential divider of R1 and (R 2 || R 3 ) where the voltage across (R 2 || R 3 ) is essentially the gate voltage ie V 1 * [(R 2 || R 3 ) / { R 1 || R 2 || R 3 ) }]. Hence, we need to maximize (R 2 || R 3 ) which is possible if R 2 =2k and R 3 =3k. This implies R 1 has to be equal to 1k.

6. If V th is .45V, what is the output voltage for the following C.S. stage?

analog-circuits-questions-answers-aptitude-test-q6

a) 4.7 V

b) 3.9 V

c) 2.1 V

d) 3.5 V

Answer: a

Explanation: Firstly, we know that the voltage gain from the gate to the source is g m * R 4 . We observe that V g is V in * [(R 2 || R 3 ) / {R 1 || R 2 || R 3 }, where V in is 1v and the values of R 1 , R 2 and R 3 are provided, which is roughly equal to .55V. This .55V is getting amplified by a factor of g m *R 4 . Now, V out is related to I d , the drain current, as V dd – I d *R 4 . Again, we know that g m = 2I d /V gs -V th . So, we have 2 equations as follows:

i. V out = g m *R 4 = 2*I d /(V gs – V th )*R 4

ii. V out = V dd – I d * R 4

We have the values of all the parameters. Solving for V out will yield Vout as 4.7V.

7. What is the output voltage in the following C.S. stage?

analog-circuits-questions-answers-aptitude-test-q6

a) 5 V

b) 0 V

c) 2.5 V

d) 3 V

Answer: a

Explanation: There is no resistor placed between the drain and the supply voltage, V dd . Hence, V out is nothing but 5V.

8. What is the role of the capacitor in the following circuit?

analog-circuits-questions-answers-aptitude-test-q8

a) Increasing the gain

b) Decreasing the gain

c) Has not role

d) Decreases the output impedance

Answer: a

Explanation: We note that this circuit is an example of a degenerated C.S. stage. If the impedance connected at the source terminal is very low, the voltage gain of the circuit increases. The capacitor is called a bypass capacitor as it helps to provide a path of much less resistance than R5. The magnitude of capacitance can be controlled, to an extent, according to the frequency of operation.

9. Coupling capacitors provide D.C. coupling during biasing of transistors.

a) True

b) False

Answer: b

Explanation: Capacitors always block D.C. signals. In fact, they provide A.C. coupling to ensure that the biasing of consecutive stages of transistors do not get affected by the individual biased conditions.

10. If \(\frac{1}{2}\)µ n C ox * = K and λ=0 for the C.S. stage shown below, what is the voltage gain ?

analog-circuits-questions-answers-aptitude-test-q8

a) (R 2 || R 3 || R 4 ) * 3K * (V 1 – 2V th )

b) (R 2 || R 3 || R 4 ) * K * (V 1 + V th )

c) (R 2 || R 3 || R 4 ) * 2K * (V 1 – V th )

d) (R 2 || R 3 || R 4 ) * K * (V 1 – V th )

Answer: d

Explanation: Ideally, the bypass capacitor would short the source terminal of the M 1 to ground. Hence, this becomes a simple C.S. stage instead of a degenerated C.S. stage. Hence, the gain is simply g m *. The total resistance connected at the drain is (R 2 || R 3 || R 4 ) since all the three resistors are parallel to each other. The transconductance(g m ) is K(V 1 -V th ). Hence the overall voltage gain is (R 2 || R 3 || R 4 ) * K * (V 1 – V th ).

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “MOSFET Amplifier with CG Configuration – 1”.

1. In the following circuit, what is the voltage at the source of the M 1 ?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q1

a) V in * R s / (R s + 1/g m )

b) V in * R s / (R s + g m )

c) V in * R s / (R s – 1/g m )

d) V in * R s / (R s + 2/g m )

Answer: a

Explanation: The impedance looking into the source of M 1 is 1/g m . V in experiences a potential divider before entering the source of M 1 . The voltage drop across R s is typically the voltage at the source and hence, it is equal to V in * R s / (R s + 1/g m ).

2. What is the input impedance of the following CG stage?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q1

a) 1/g m

b) 2* R s || 1/g m

c) R s || 1/g m

d) R s || 2/g m

Answer: c

Explanation: The input impedance can be calculated by performing a small signal analysis at the input node. We need to set V g and V dd to 0V and apply a small input voltage at the source. Now, the impedance looking into the source is 1/g m and R s is parallel to this impedance. Hence, the total input impedance is R s || 1/g m .

3. If Channel Length modulation is neglected, what is the voltage gain from the source to the drain for the CG stage shown below?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q1

a) g m * R d * {2R s / (R s + 1/g m )}

b) g m * R d * {R s / (R s + 2/g m )}

c) g m * R d * {2R s / (R s – 1/g m )}

d) g m * R d * {R s / (R s + 1/g m )}

Answer: d

Explanation: The voltage gain from the source of M 1 to the drain of M1 can be found out from a small signal analysis and it’ll turn out to be g m * R d . But the input voltage is a result of the potential divider between R s and 1/g m . Hence, the overall voltage gain is g m * R d * {R s / (R s + 1/g m )}.

4. What is the input impedance for the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q4

a) r o

b) 1/g m

c) R d || r o

d) Infinite

Answer: b

Explanation: The input to the CG stage is placed at the source of M 1 . The impedance looking into the node of M 1 is simply 1/g m . Hence, the input impedance is 1/g m . R d || r o is the output impedance if channel length modulation is present.

5. If channel length modulation is neglected, what is the voltage gain for the following circuit from source to drain?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q4

a) g m * R d

b) g m * r o

c) g m * (r o || R d )

d) -g m * R d

Answer: a

Explanation: In absence of channel length modulation, r o =0. The gain is simply g m * R d . It should be noted that the CG stage doesn’t invert and hence the voltage gain is not -g m * R d .

6. If channel length modulation is present, what is the output impedance of the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q4

a) R d

b) R d || r o

c) r o

d) 0

Answer: b

Explanation: In presence of channel length modulation, r o appears to be in parallel to R d . Hence, the total output impedance becomes R d || r o . In the absence of channel length modulation, the output impedance is R d only.

7. If channel length modulation is neglected, what is the voltage gain for the following CG stage?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q1

a) R d /(1/g m – R s )

b) R d /(3/g m + R s )

c) R d /(1/g m + R s )

d) R d /(2/g m + R s )

Answer: c

Explanation: The above circuit is quite similar to the CS stage with degeneration. But the CG stage doesn’t invert and after performing a small signal analysis, the voltage gain comes out to be R d /(1/g m + R s ).

8. If channel length modulation is present. what is the overall output impedance of the following CG stage?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q8

a) R d || {R s *(1+g m * r o ) + r o }

b) R d || {R s *(1+g m * r o ) + 2r o }

c) R d || {R s *(1+g m * r o ) – r o }

d) R d || {R s *(2+g m * r o ) + r o }

Answer: a

Explanation: The impedance looking into the drain of M1 would be similar to that of a CS stage with source degeneration. That implies the impedance is R s *(1+g m * r o ) + r o . But this impedance is parallel to R d . Hence, the overall output impedance becomes R d || {R s *(1+g m * r o ) + r o }.

9. The current gain of a simple CG stage is approximate ____________

a) Infinity

b) unity

c) twice

d) 0

Answer: b

Explanation: The input to a CS stage is at the source of M 1 . This current simply flows into the channel and flows out of M 1 . Approximately, we can say that the overall current gain is unity since the gain contributes very low current.

10. The voltage gain of a simple CG stage is greater than that of a follower.

a) True

b) False

Answer: a

Explanation: The voltage gain of a follower is always less than that of a CG stage. This can be proven by a small signal analysis that the voltage gain for a follower is R s /(1/g m + R s ) while that of the CG stage is g m * R d . Hence the above statement is true.

11. If channel length modulation is neglected, what is the voltage gain of the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q11

a) – {g m1 * R d * g m2 * R d1 }

b) g m1 * R d * g m2 * 2R d1

c) – {g m1 * R d * 2g m2 * R d1 }

d) g m1 * 2R d * g m2 * R d1

Answer: a

Explanation: This is a cascade of a CG stage preceding a CS stage. For the CG stage, the voltage gain is g m * R d . But after this stage, the signal gets amplified by the CS stage with a factor of –(g m2 * R d1 ). Hence, the overall voltage gain is the product of both the factors ie –(g m1 * R d * g m2 * R d1 ). Note that since channel length modulation is absent, r o is not present in the expression of gain.

12. If channel length modulation is present, what is the voltage gain of the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q11

a) g m1 * (R d || r o1 ) * g m2 * R d1

b) – {g m1 * R d * g m2 * 2(R d1 || r o2 )}

c) – {g m1 * (R d || r o1 ) * g m2 * (R d1 || r o2 )}

d) g m1 * 2R d * g m2 * R d1

Answer: c

Explanation: This is a cascade of a CG stage preceding a CS stage. For the CG stage, the voltage gain is g m * (R d || r o1 ). But after this stage, the signal gets amplified by the CS stage with a factor of – {g m2 * (R d1 || r o2 )}. Hence, the overall voltage gain is the product of both the factors i.e. – {g m1 * (R d || r o1 ) * g m2 * (R d1 || r o2 )}. Note that the input impedance looking into M 2 is infinite ad hence the voltage gain of the CG stage is typically unaffected by the CS stage .

13. If channel length modulation is neglected, what is the voltage gain for the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q13

a) – {g m1 * R d * R d / (1/g m2 + R s )}

b) – (g m1 * 2R d * R d / R s )

c) – {g m1 * R d * R d / (1/g m2 + R s )}

d) – {g m1 * R d * R d / (1/g m2 + 2R s )}

Answer: a

Explanation: This is a cascade of a CG stage preceding a CS stage. For the CG stage, the voltage gain is g m * R d . But after this stage, the signal gets amplified by a degenerated CS stage with a factor of -R d / (1/g m2 + R s ). Hence, the overall voltage gain is the product of both the factors i.e. – {g m1 * R d * R d / (1/g m2 + R s )}. Note that the input impedance looking into M 2 is infinite ad hence the voltage gain of the C.G. stage remains unaffected by the C.S. stage .

14. If channel length modulation is neglected, what is the overall voltage gain of the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q14

a) – {g m1 * (R d || 1/g m2 ) * (R d1 / (1/g m2 + R d ))}

b) – {g m1 * (R d || 1/g m2 ) * g m2 * 2R d1 }

c) – {g m1 * R d * g m2 * R d1 }

d) – {g m1 * 1/g m2 * g m2 * R d1 }

Answer: a

Explanation: This is a cascade of CS stage preceding a CG stage. The voltage gain of the first stage is – (g m1 * R d || 1/g m2 ). This is because the drain of M 1 is connected to the source of M 2 and the impedance looking into the source of M 2 is 1/g m2 . Now, the source of the CG stage is connected to R d and hence the voltage gain due to this stage is affected by source degeneration and the voltage gain is R d1 / (1/g m2 + R d ). The overall voltage gain is – {g m1 * (R d || 1/g m2 ) * (R d1 / (1/g m2 + R d ))}.

15. If channel length modulation is neglected, what is the voltage gain of the following circuit?

analog-circuits-questions-answers-mosfet-amplifier-cg-configuration-1-q15

a) g m2 /g m1

b) – {g m2 * R d * g m1 * R 1 }

c) R d /g m2

d) 0

Answer: a

Explanation: The impedance looking into the source of M 1 is 1/g m1 . Hence, the product of this times the transconductance of M 2 will be the overall voltage gain i.e. g m2 /g m1 . Note that the gain is function of only the intrinsic parameters of the MOSFET and independent of other parameters.

This set of Analog Circuits Assessment Questions and Answers focuses on “MOSFET Amplifier with CG Configuration – 2”.

1. If the inverse of transconductance is .5KS -1 , what should be the value of R c so that the overall voltage gain is 8?

analog-circuits-assessment-questions-answers-q1

a) About 3K

b) .4K

c) About 4K

d) Such a gain is not possible

Answer: c

Explanation: The voltage gain is given by g m R d . So, g m become 2mS and a resistance of 4k Ω will be necessary.

2. What is the input impedance of the following circuit, if channel length modulation is present?

analog-circuits-assessment-questions-answers-q1

a) g m || 1/r o

b) g m * r o

c) g m || 2/r o

d) g m

Answer: a

Explanation: The input impedance can be found by performing a small signal analysis at the input node i.e. source of the MOSFET. Due to channel length modulation, the effect of r o would make the input impedance g m || 1/r o .

3. The C.G. stage can be regarded as a current buffer.

a) True

b) False

Answer: a

Explanation: The input current flows through the source of the MOSFET while the gate current is nearly equal to 0. Hence, the entire current coming out of the drain is due to the source current.

4. If M 1 suffers from channel length modulation but M 2 doesn’t, what is the voltage gain?

analog-circuits-assessment-questions-answers-q4

a) g m1 * R d || 1/g m2 * g m2 * R d2

b) g m1 * R d || 1/g m2 * g m2 * 2R d2

c) g m1 * R d || 12/g m2 * g m2 * R d2

d) g m1 * R d * g m2 * R d2

Answer: a

Explanation: The voltage gain due to M 1 is g m1 * R d || 1/g m2 since we find that the drain of M 1 is connected to the source of M 2 and the impedance looking into the source of a MOSFET is 1/g m2 . Now, the voltage gain due to the 2nd CG stage is simply g m2 *R d2 . Hence, the total voltage gain is a product of both the factors ie g m1 * R d || 1/g m2 * g m2 * R d2 .

5. If M 2 suffers from channel length modulation but M 1 doesn’t, what is the voltage gain?

analog-circuits-assessment-questions-answers-q4

a) 2g m1 * R d || 1/g m2 * g m2 * R d2

b) 2g m1 * R d || 1/g m2 * g m2 * 2R d2

c) g m1 * R d || 12/g m2 * g m2 * R d2

d) g m1 * R d || 1/g m2 || r o2 * g m2 * R d2

Answer: d

Explanation: The voltage gain due to M 1 is g m1 * R d || 1/g m2 || r o2 since we find that the drain of M 1 is connected to the source of M 2 and the impedance looking into the source of a MOSFET is 1/g m2 || r o2 due to the channel length modulation of M 2 . Now, the voltage gain due to the 2 nd CG stage is simply g m2 *R d2 . Hence, the total voltage gain is a product of both the factors ie g m1 * R d || 1/g m2 * g m2 * R d2 .

6. If channel length modulation is present, what is the total impedance at node X?

analog-circuits-assessment-questions-answers-q4

a) R d || r o1 || 1/g m2

b) R d || r o1 || 1/g m2 || r o2

c) R d || 2r o1 || 1/g m2 || r o2

d) R d || r o1 || 2/g m2 || r o2

Answer: b

Explanation: We develop a Thevenin’s equivalent w.r.t. node X and ground. But this is lengthy process. But then again, we can use the process as follows. For Thevenising, firstly we set V dd and V in to ground. Thereafter, we see that R d and r o1 are in parallel to each other since they are connected from node X to ground. Next, we see that the impedance provided by M 2 is 1/g m2 || r o2 but it again occurs from Node x to ground. Hence, all the impedances are parallel to each other and the total impedance at node X is R d || r o1 || 1/g m2 || r o2 .

7. For an ideal current source, what is the voltage gain of the following circuit?

analog-circuits-assessment-questions-answers-q8

a) g m1 * r d1 * g m2 * 2R d2

b) – g m1 * r d1 * g m2 * R d2

c) 2g m1 * r d1 * g m2 * R d2

d) – g m1 * r d1 * g m2 * R d2

Answer: d

Explanation: The voltage gain for the C.G. stage is simply g m * R d1 . The voltage gain of the next stage is – g m * R d2 . Note that, the ideal current source exhibits infinite output impedance and doesn’t affect but only increases the linearity of operation.

8. How can we reduce the number of MOSFET’s in the following circuit?

analog-circuits-assessment-questions-answers-q8

a) Scale the aspect ratio

b) Increase the transconductance

c) Increase the Power supply

d) Not possible

Answer: a

Explanation: increasing the transconductance or power supply is possible but we need to increase our power budget for both situations which is not possible. However, we can increase the aspect ratio of one MOSFET. This is because the total current entering into R 1 is a sum of the currents originating from the drain of each MOSFET and they are equal to each other. Hence, scaling the aspect ratio is a plausible situation.

9. What is the relation between V b and V in in the following circuit?

analog-circuits-assessment-questions-answers-q8

a) V b > V in by V th

b) V b = V in

c) V b < V in by V th

d) No relation

Answer: a

Explanation: To turn an NMOS on, we need to keep the voltage difference between the gate and the source greater than the threshold voltage. Hence, the gate potential should greater than the source potential by V th .

10. What is the total output impedance at node x?

analog-circuits-assessment-questions-answers-q10

a) R 1 || r o1 || 2 * r o2 || r o2 || 2*r o4 … || r on

b) R 1 || 2 * ( r o1 || r o2 … || r on )

c) R 1 || r o1 || r o2 … || r on

d) R 1 + (r o1 || r o2 … || r on )

Answer: c

Explanation: We note that all the MOSFET’s are in parallel. The output impedance of the i th MOSFET is given by r oi . Hence, the total impedance at node x is simply R 1 || r o1 || r o2 …|| r on . Note that R 1 is parallel to each MOSFET. This is because, while dining the output impedance, we set V in and V cc to zero. Note that R 1 is connected from node X to ground, all the MOSFET’s are connected form node x to ground.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Different Types of Multivibrators – 1”.

1. What is a square wave generator?

a) Flip-flop

b) Bi-stable multivibrator

c) Astable multivibrator

d) Monostable multivibrator

Answer: c

Explanation: An astable multivibrator is one which does not have any stable state. It has two quasi-stable output states which keep toggling at regular intervals. The output waveform is thus a square wave and this circuit is also called a square wave generator or a free running oscillator.

2. Given the circuit below, find the feedback factor.

analog-circuits-questions-answers-different-types-multivibrators-1-q2

a) 3

b) 1/3

c) 4

d) 1/4

Answer: d

Explanation: The feedback factor is β = R1/R1+R2

β = 10k/30k+10k = 1/4.

3. In an astable multivibrator using an op-amp, the feedback factor is 0.5 and the supply voltage is ±12V. What are the quasi-stable output state and the input to the non-inverting terminal?

a) Quasi-stable output = ±12V, Input to non inverting terminal = ±12V

b) Quasi-stable output = ±6V, Input to non inverting terminal = ±12V

c) Quasi-stable output = ±12V, Input to non inverting terminal = ±6V

d) Quasi-stable output = ±12V, Input to non inverting terminal = 0V

Answer: c

Explanation: Quasi-stable output = ±VSat = ± VSupply = ±12V

Input to non inverting terminal = ±βVSat = ±6V.

4. What is the duty cycle of the output of an astable multivibrator?

a) 50%

b) 100%

c) 75%

d) 55%

Answer: a

Explanation: An astable multivibrator is a square wave generator. Charging and discharging times of the capacitor are equal and thus the output waveform has a duty cycle of 50%.

5. Given that the feedback factor of an astable multivibrator is 0.3, find the frequency of the output.

analog-circuits-questions-answers-different-types-multivibrators-1-q5

a) 22Hz

b) 20kHz

c) 20Hz

d) 40Hz

Answer: c

Explanation: T O = 2RCln = 2RCln = 2x10x4x10 -3 x0.619 = 49.52ms

f = 1/T O = 20Hz.

6. Consider the following circuit and find the time period of the output of the multivibrator.

analog-circuits-questions-answers-different-types-multivibrators-1-q6

a) 0.436 ms

b) 0.436 seconds

c) .5 ms

d) 5.22 seconds

Answer: b

Explanation: Since the two feedback resistors are same, then β=0.5.

Thus time period T O = 2RCln3 = 2x20x10x10 -3 x1.09 = 436ms = 0.436 seconds.

7. How can the duty cycle be changed for an astable multivibrator?

a) By adding another capacitor to the circuit

b) By adding diodes to the circuit

c) By adding an inductor to the circuit

d) The duty cycle cannot be changed

Answer: b

Explanation: To generate a square wave of duty cycle other than 50%, diodes can be connected so that charging and discharging now occurs through these diodes. This thus changes the time period as well as the duty cycle of the diodes.

8. Given that the feedback factor is 0.6, find the time period of the circuit below.

analog-circuits-questions-answers-different-types-multivibrators-1-q8

a) 0.331 seconds

b) 0.303 seconds

c) 0.276 seconds

d) 0.606 seconds

Answer: b

Explanation: T = (R X C + R Y C)ln

T = 22x10x10 -3 xln = 22x10x10 -3 x1.38 = 0.303 seconds.

9. The monostable multivibrator has one quasi-stable state and one unknown state.

a) True

b) False

Answer: b

Explanation: The monostable multivibrator is a circuit whose output has one stable state and one quasi-stable state. If the trigger input is not applied then output remains in the stable state indefinitely and whenever the trigger is applied, the output enters the quasi-stable state. The output then changes back to the stable state on its own after a short duration.

10. Which of these is not a type of monostable multivibrator?

a) Schmitt trigger as a monostable multivibrator

b) Emitter coupled monostable multivibrator

c) Using an op-amp

d) 555 Timer as a monostable multivibrator

Answer: a

Explanation: A Schmitt trigger circuit is a comparator circuit, also called a regenerative comparator. It converts any waveform into a square wave. It is not a monostable multivibrator, unlike the other three options.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Different Types of Multivibrators – 2”.

1. Given the following circuit.

analog-circuits-problems-q1

The supply voltage being applied is ±15V. The diode cut-in voltage is 0.7V. Find the maximum value of R such that circuit can behave as a monostable multivibrator.

a) 612.8kΩ

b) 33kΩ

c) 220.22kΩ

d) 450.8kΩ

Answer: a

Explanation: The condition to be followed is βV Sat > V Y .

β = R1/R1+R2 = 30k/30k+R

Thus . 15 > 0.7

450k/30k + R > 0.7

30k+R < 642.85k

R < 612.8kΩ.

2. For the given circuit, find the time period of the output waveform, given that the diode is used is of Silicon and the supply voltage being applied is ±15V. The feedback factor is 0.4.

analog-circuits-problems-q2

a) 11.12 ms

b) 12.4 ms

c) 11.2 seconds

d) 5.6 ms

Answer: a

Explanation: T = RCln(1+V γ /V Sat /1-β)

T = 10x2x10 -3 xln/0.6) = 20×10 -3 ln=20×0.556×10 -3

T = 11.12 ms.

3. Find the approximate frequency of output waveform of a monostable multivibrator given that RC = 20×10 -3 and feedback factor = 0.3.

a) 200Hz

b) 142Hz

c) 233Hz

d) Can’t be found out without supply voltage value

Answer: b

Explanation: T = RCln

T = 20×10 -3 x ln = 20×0.35×10 -3 = 7ms

f = 0.142 kHz = 142 Hz.

4. Consider the circuit shown below.

analog-circuits-problems-q4

R1=5kΩ, R2=5kΩ, R3=5kΩ, R4=10kΩ, R5=20kΩ, C1=10μF. Calculate the total charging time and discharging time.

a) The charging time = 0.2 seconds, the is charging time is 0.2 seconds

b) The charging time = 0.3 seconds, the discharging time is 0.2 seconds

c) The charging time = 0.3 seconds, the discharging time is 0.3 seconds

d) The charging time = 0.5 seconds, the discharging time is 0.4 seconds

Answer: b

Explanation: Discharge time = R5.C1 = 20x10x10 -3 = 0.2 seconds

Charging time = C1 = 30x10x10 -3 = 0.3 seconds.

5. For the given circuit, find the duty cycle of the output.

analog-circuits-problems-q4

R4=30kΩ, R5=25kΩ.

a) 0.6875

b) 0.7211

c) 0.5681

d) 0.5010

Answer: a

Explanation: Duty cycle = T High /T O

Duty cycle = R4+R5/R4+2xR5

Duty cycle = 55/80= 0.6875.

6. What is the output frequency for the following circuit?

analog-circuits-problems-q4

R4=30kΩ, R5=40kΩ, C1=5nF.

a) 2.63 kHz

b) 3kHz

c) 263 kHz

d) 4.4 kHz

Answer: a

Explanation: Output frequency = 1.45/xC1

f O = 1.45×1000000/110×5 = 2.63 kHz.

7. In the astable multivibrator using IC 555, it can be used as a voltage to frequency converter.

a) True

b) False

Answer: a

Explanation: An astable multivibrator can be easily used as a voltage controlled oscillator or as a voltage to frequency converter if a control voltage is applied to the control pin of the IC. The control pin is usually grounded through a capacitor if unused.

8. How can a monostable multivibrator using IC 555 be used as a PWM generator?

a) If a diode is connected across the resistor RA

b) If a modulating signal m is applied at the control pin

c) If the control pin is always kept high

d) It cannot be used as a PWM generator ever

Answer: c

Explanation: A monostable multivibrator can be used as a PWM generator if a modulating signal is applied to the control pin. The control pin is used to vary the voltage at the inverting node of the upper comparator. If unused, then the control pin is grounded through a capacitor.

9. Given that the charging current of capacitor is constant in a monostable multivibrator using IC 555, then find the type of output waveform, type of capacitor voltage waveform and the time period of output.

a) The capacitor waveform is a ramp, the output waveform is sinusoidal, the time period is \

The capacitor waveform is a ramp, the output waveform is a pulse, the time period is \

The capacitor waveform is a ramp, the output waveform is a ramp, the time period is \(\frac{2.C.VCC}{3.I}\)

Answer: b

Explanation: If a constant charging current is applied through the capacitor, the output is a pulse, while capacitor voltage is a ramp.

Time period of ramp/pulse = T O = 2V CC xC/3I.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Operational Amplifiers”.

1. Which of these is incorrect for an operational amplifier?

a) It has a high voltage gain

b) It is a direct coupled amplifier

c) It is only useful for amplifying AC signals

d) It was originally designed to perform mathematical operations

Answer: c

Explanation: Operational amplifier is a high voltage gain, direct coupled amplifier which can be used to perform mathematical operations on analog signals. It can be used to amplify both DC and AC signals.

2. In the given block diagram of an op-amp. What are A, B, C and D?

analog-circuits-questions-answers-operational-amplifiers-q2

a) A = Dual input and balanced output differential amplifier, B = Dual input and unbalanced output differential amplifier, C = Level shifter, D = Power amplifier

b) A = Dual input and balanced output differential amplifier, B = Dual input and balanced output differential amplifier, C = Dual input and unbalanced output differential amplifier, D = Normal amplifier

c) A = Dual input and unbalanced output differential amplifier, B = Dual input and balanced output differential amplifier, C = Voltage regulator, D = Power amplifier

d) A = Normal amplifier, B = Dual input and unbalanced output differential amplifier, C = Level shifter, D = Dual input and balanced output differential amplifier

Answer: a

Explanation: The correct block diagram is analog-circuits-questions-answers-operational-amplifiers-q2a

3. In an ideal op-amp, which is not true?

a) Open loop voltage gain is infinite

b) Input resistance is infinite

c) Slew rate is infinite

d) CMRR is zero

Answer: d

Explanation: For an ideal op-amp, the open loop voltage gain is infinite. The output resistance is 0 and the input resistance is infinite. Op-amp has zero input current, zero offset voltage, infinite bandwidth, infinite CMRR and infinite slew rate.

4. A practical op-amp has a bandwidth of only 10 Hz. Gain is 10 6 , and the required bandwidth is 100 kHz. How much feedback is required?

a) 0.99% negative feedback

b) 0.99% positive feedback

c) 1% negative feedback

d) 1% positive feedback

Answer: a

Explanation: B2 = B1 = 10(1+β10 6 ) = 100k

1 + β10 6 = 10k

β = 9.999×10 -3

In percentage, feedback β = 0.99% negative feedback.

5. Given that for an op-amp the gain is 10 3 , the slew rate is 1.5V/μsec. Input is 5×10 -3 sinωt, calculate maximum frequency to prevent distortion.

a) 47.7 kHz

b) 0.3 MHz

c) 477 Hz

d) 3 kHz

Answer: a

Explanation: dV OUT /dT =< Slew rate

A.Vmω =< 1.5 V/μsec

10 3 .5.10 -3 .ω = < 1.5×10 6

ω=<0.3×10 6

Frequency f = 0.0477×10 6 Hz.

6. Given that CMRR is 100dB. Input common-mode voltage is 12 V. Differential voltage gain is 4000. Calculate output common-mode voltage.

a) 48V

b) 0.48V

c) 20V

d) 11V

Answer: b

Explanation: CMRR = 20 log(A D /A CM ) = 20 log(4000×12/V ocm ) = 100

Log(48000/V OCM ) = 5

48000/V OCM = 10 5

V OCM = 0.48V.

7. The unity gain bandwidth for an op-amp having open loop gain 2×10 6 is 10 Mhz. Calculate the AC gain of op-amp at an input of 2000 Hz.

a) 2000

b) 5000

c) 10000

d) 12.5

Answer: b

Explanation: UGB = A OL f OL

f OL = 10M/2×10 6 = 5Hz

The AC gain |A| = \(\frac{AOL}{\sqrt{1+^2}}\)

|A| = 2×10 6 /400 = 5000.

8. Which of the following option is correct according to the below statements?

A: Voltage gain of op-amp decreases at high frequencies

B: Its internal structure uses a capacitor

a) Both A and B are correct, and B is the correct reason for A

b) Both A and B are correct, but B is not the correct reason for A

c) A is correct and B is incorrect

d) A is incorrect and B is correct

Answer: a

Explanation: The internal structure of an op-amp uses a compensation capacitor for stability purpose. It provides dominant pole compensation; thereby the op-amp remains stable. However, the op-amp gain remains constant at low frequencies but decreases at high frequencies due to a compensation capacitor.

9. Till what frequency do we get amplification from IC 741?

a) Unity gain bandwidth

b) 3-dB frequency

c) Infinity

d) UGB + f OL

Answer: a

Explanation: The 3dB frequency is the cut-off frequency, where the gain is \(\frac{1}{\sqrt{2}}\) of the maximum. The gain is only constant for infinite frequency, that is, has infinite bandwidth if the op-amp is ideal, which practically doesn’t exist. The UGB is the point at which the gain of op-amp reaches 1.

10. What is the use of the compensation capacitor in op-amp?

a) Improves the amplification of op-amp

b) Decreases the slew rate of op-amp

c) Increases the bandwidth of op-amp

d) Op-amp acts as all pass filter

Answer: b

Explanation: Compensation capacitor in the internal structure of op-amp to improve its frequency response, increasing its stability. It also decreases the slew rate of the op-amp.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Frequency Filters – 1”.

1. Which is not a difference between active and passive filter?

a) A passive filter does not use op-amp while an active filter uses an op-amp

b) A passive filter can’t use an inductor while an active filter can

c) A passive filter performs only filtering while an active filter amplifies too

d) A passive filter is used at audio frequency and an active at radio frequency

Answer: d

Explanation: A passive filter can consist of all R, L and C elements. An op-amp is used in an active filter, and it also provides amplification along with filtering. There are no inductors used in active filters because they are bigger in size and bulky. Active filters are used at audio frequency and passive filter at radio frequency.

2. In a low pass filter as below, find the cut-off frequency for the following circuit.

analog-circuits-questions-answers-frequency-filters-1-q2

Given that R1=20kΩ, R2=25kΩ, C1=10nF.

a) 640 kHz

b) 636 Hz

c) 5.5 kHz

d) 200 Hz

Answer: b

Explanation: The cut-off frequency for the above filter is f c = 1/2πR2C1

f C = 1000000/2π25×10 = 636 Hz.

3. Given that the maximum gain of a low pass filter using op-amp is 5.5 and the resistor R1 = 10kΩ, find the value of R2.

analog-circuits-questions-answers-frequency-filters-1-q2

a) 220kΩ

b) 55kΩ

c) 50Ω

d) -55kΩ

Answer: b

Explanation: The maximum gain is at low frequencies and at low frequencies, the capacitance reactance is infinite and thus the total feedback impedance Z F = R F = R2

Thus gain = -Z F /Z = -R2/R1

Amplitude = 5.5 = R2/R1 = R2/10k

R2 = 55kΩ.

4. When the input frequency is equal to the cutoff frequency, how much is the phase shift in the output?

a) 180°

b) -135°

c) -45°

d) 135°

Answer: d

Explanation: Phase shift = 180° – tan -1 f/fC

Phase shift = 180-45 = 135°.

5. For the circuit, calculate the phase shift.

analog-circuits-questions-answers-frequency-filters-1-q5

It is given that R1=20kΩ, C1=2nF, R2=22kΩ, and input signal is 2sin6π103t.

a) 233.04°

b) 230.32°

c) 333.04°

d) 129.67°

Answer: a

Explanation: Net phase shift is 180 + tan -1 fC/f

f c = 1/2πR1C1 = 1000000/2π20×2 = 3.978 kHz

Phase shift = 180 + tan -1 3.987/3 = 233.04°.

6. What is the frequency response of the filter shown below?

analog-circuits-questions-answers-frequency-filters-1-q6

Given R1C1=R2C2.

a) analog-circuits-questions-answers-frequency-filters-1-q6a

b) analog-circuits-questions-answers-frequency-filters-1-q6b

c) analog-circuits-questions-answers-frequency-filters-1-q6c

d) analog-circuits-questions-answers-frequency-filters-1-q6d

Answer: b

Explanation: The given circuit is a band pass filter. The upper and lower cut-off frequencies depend on the RC constant. However, since R1C1 = R2C2, this means that both the cut-off frequencies are equal. Thus they meet at the same point and form the response as above.

7. Given the following circuit, find the maximum gain.

analog-circuits-questions-answers-frequency-filters-1-q7

a) 1+R2/R1

b) –R3/R2

c) 1+R3/R2

d) 1+ R1.R3/2

Answer: c

Explanation: The above circuit is a low pass filter of the non-inverting type, where the input is at the non-inverting end. The gain is A = 1+R3/R2 / 1+jωR1C1

Thus maximum gain is A = 1+R3/R2.

8. For a low pass filter of non-inverting type, the cutoff frequency is 2kHz and the input frequency is 4kHz. Find the phase shift in output.

a) 117°

b) -117°

c) 243°

d) -63°

Answer: d

Explanation: Phase shift = -tan -1 f/fC = -tan -1 2 = -63°.

9. A filter is provided of order 3, find the roll-off rate.

a) 6 dB/decade

b) 60 dB/octave

c) 60 dB/decade

d) 3 dB/decade

Answer: c

Explanation: Roll-off rate is the rate at which the gain of a filter decreases outside the pass-band. Roll of rate is increased as the order increases. For an nth order filter, roll-off rate is 20xn dB/decade.

10. Consider the circuit below and find its cut-off frequency.

analog-circuits-questions-answers-frequency-filters-1-q10

R1=10kΩ, R2=20kΩ, R3=30kΩ, C1=2nF, C2=4nF, R4=15kΩ.

a) 4.6 kHz

b) 6.2 kHz

c) 5.5 kHz

d) 4.2 kHz

Answer: a

Explanation: f C = \(\frac{1}{2π\sqrt{R4.R1.C1.C2}}\)

f C = 4.6 kHz.

This set of Analog Circuits Question Paper focuses on “Frequency Filters – 2”.

1. Find which one is a sallen-key topology.

a) analog-circuits-question-papers-q1a

b) analog-circuits-question-papers-q1b

c) analog-circuits-question-papers-q1c

d) analog-circuits-question-papers-q1d

Answer: a

Explanation: Sallen-key topology is an electronic filter topology used to implement second-order active filters. It requires a single op-amp for gain control and 4 passive RC components to accomplish the tuning. These are also called positive feedback circuits since the output flows back into non-inverting terminal too.

2. A first-order Butterworth low pass filter is an interconnection of ____________ and ___________

a) Single low pass RC circuit, Voltage follower

b) Low pass RC circuit, Band-pass RC circuit

c) Low pass RC circuit, LC feedback

d) Single low pass RC circuit, Power amplifier

Answer: a

Explanation: A first-order Butterworth LPF is an interconnection of a single low pass RC circuit and a voltage follower.

analog-circuits-question-papers-q2

3. Considering a second-order Butterworth LPF using an op-amp, where damping factor = 1.414 find the value of R3, given the following circuit.

analog-circuits-question-papers-q3

a) 6.71 kΩ

b) 4.22 kΩ

c) 2.93 kΩ

d) 5 kΩ

Answer: c

Explanation: Maximum gain, A = 3 – α = 1.586

For the above circuit, the gain is 1 + R3/R2 = 1.586

R3/R2 = 0.586

R3 = 2.93 kΩ.

4. For the following circuit, R2=220kΩ, R1=10kΩ, find the maximum gain and the phase shift at the cutoff frequency.

analog-circuits-question-papers-q4

a) Maximum gain = 22, Phase shift = 45°

b) Maximum gain = 23, Phase shift = 135°

c) Maximum gain = 22, Phase shift = 225°

d) Maximum gain = 23, Phase shift = 45°

Answer: d

Explanation: Above is a high pass filter, with maximum gain = 1+R2/R1 = 23

Phase shift = tan -1 = 45°.

5. Find the cutoff frequency for the following circuit.

analog-circuits-question-papers-q5

a) 25 kHz

b) 3987 rad/sec

c) 2500 Hz

d) 25000 rad/sec

Answer: d

Explanation: Cutoff frequency ω C = 1/RC

ω C = 1000000/20×2 = 25000 rad/s.

6. Given a second-order Butterworth HPF, find the maximum gain magnitude.

a) 1.586 dB

b) 4 dB

c) 2.66 dB

d) 1 dB

Answer: b

Explanation: For a second-order Butterworth HPF, the maximum gain A MAX = 3 – α.

α is the damping factor = 1.414

A MAX = 1.586

In dB, the gain is 20 log = 4dB.

7. Consider the following circuits.

analog-circuits-question-papers-q7

analog-circuits-question-papers-q7a

If a band-pass filter is created by using the above two circuits in cascade, find the correct relation from the choices below.

a) R 4 C 2 >> R 1 C 1

b) R 4 C 2 << R 1 C 1

c) R 6 R 5 = R 2 C 3

d) R 4 C 2 = R 1 C 1

Answer: a

Explanation: A band-pass filter can be created as an interconnection of an LPF and an HPF. For this to work, the LPF cut-off frequency should be much greater than the HPF cut-off frequency.

Thus, 1/2π R 1 C 1 >> 1/2π R 4 C 2

Thus R 4 C 2 >> R 1 C 1 .

8. Which of these is incorrect for a band-stop filter?

a) An adder is required when designing it using LPF and HPF

b) LPF and HPF are connected in parallel

c) The HPF cut-off frequency should be much higher than LPF cut-off frequency

d) The LPF and HPF are connected in series

Answer: d

Explanation: When designing a band-stop filter, a HPF and LPF are connected in parallel, and their output goes into the input of an adder to get the desired output. For correct output, the cut-off frequency of HPF should be much higher than that of the LPF.

9. Which of these is wrong for an all-pass filter?

a) It is used for phase equalization in a communication system

b) It is used in landline communication

c) Its phase shift is -2tan -1 RC, between 0 to -180°

d) It can be made using a single op-amp

Answer: c

Explanation: An all-pass filter passes all frequencies but provides a different phase shift to each frequency present in the circuit. It is used for phase equalization or delay equalization and is used in landline communication. Following is a circuit of an all-pass filter using a single op-amp.

analog-circuits-question-papers-q9

However, its phase shift is -2tan -1

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Op-Amp Characteristics”.

1. Consider the ideal op-amp shown and find the correct output.

analog-circuits-questions-answers-op-amp-characteristics-q1

a) analog-circuits-questions-answers-op-amp-characteristics-q1a

b) analog-circuits-questions-answers-op-amp-characteristics-q1b

c) analog-circuits-questions-answers-op-amp-characteristics-q1c

d) analog-circuits-questions-answers-op-amp-characteristics-q1d

Answer: b

Explanation: For an ideal op-amp, the gain is ∞. But the output does not go to an infinite value. The output value is limited by the power supply voltages. The maximum value can be +V CC and minimum is –V EE . Hence, the maximum output is +15V.

2. Consider a practical op-amp where the power supply is V CC = +12V and V EE = -12V. The open loop gain is 106 and open loop bandwidth is 5Hz. What is the maximum positive input before which the output is saturated?

a) 12 mV

b) 0.012 mV

c) 24 mV

d) 12V

Answer: b

Explanation: The output is saturated at the input +V Sat /A OL or –V Sat /A OL .

For positive saturation, the maximum allowable input is 12/10 6 = 0.012 mV.

3. Given an op-amp who’s gain is unknown but the output is saturated, which of the following is not possible?

a) No feedback is being applied

b) Negative feedback is applied while input is more than –V Sat /A OL

c) Positive feedback is applied

d) Negative feedback is applied while the input is more than V Sat /A OL

Answer: b

Explanation: If op-amp is used without feedback or with positive feedback, the difference voltage V D will be large enough and hence op-amp can be considered to be in the saturation region. If op-amp is used with negative feedback then the input is smaller. Saturation of output occurs if the input is not between –V Sat /A OL and +V Sat /A OL .

4. The current flowing into one input of the op-amp is 12nA and it is 10 nA in the other. Find the input offset current.

a) 1nA

b) 2nA

c) -2nA

d) 11nA

Answer: b

Explanation: I IO = |I B1 – I B2 |

I IO = 2nA.

5. What is incorrect regarding the output offset voltage of op-amp?

a) It is the output when the input voltage at both input pins of op-amp is zero

b) It occurs due to dissimilarities in the internal structure of the op-amp

c) The output offset voltage does not depend on the supply voltage

d) The output offset voltage can be in the units of Volts

Answer: c

Explanation: Output offset voltage is the output voltage of the op-amp when the input at both terminals is zero. It occurs due to the dissimilarities and mismatches in the internal structure of the op-amp. The value of output offset voltage is in volts. It varies with changes in supply voltage.

6. Given that the PSRR of an op-amp is 120dB. The supply lies between 12V to 15V. Calculate the change in the input offset voltage.

a) 3μV

b) ±3μV

c) ±3×10 -12 V

d) -3V

Answer: b

Explanation: PSRR = 20log(ΔV S /ΔV IO )

ΔV IO = ±3/10 6 = ±3μV.

7. Consider the circuit shown. The input V I = 10sin2π10 6 t. Calculate the duty cycle of the output.

analog-circuits-questions-answers-op-amp-characteristics-q7

a) 0.43

b) 0.065

c) 0.36

d) 0.5

Answer: c

Explanation: Duty cycle for a signal = Duration when output is V Sat /Total period

Let input = V I = 10 sinθ

The output goes to +V Sat whenever the input V I crosses amplitude of 4V.

Thus 4 = 10sinθ

Θ = sin -1 0.4 = 0.411 rad = 23.57°

The duty cycle = [180 – θ – θ]/360 = 180-47.14/360 = 0.36.

8. An op-amp uses a level shifter internally to prevent the loading effect.

a) True

b) False

Answer: a

Explanation: A level shifter is used to eliminate the DC bias voltage present in the output of the intermediate stage which can cause distortion. Also, the level shifter has high input resistance which prevents loading effect on the intermediate stage since it is also a voltage buffer.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “BJT Configuration”.

1. For a BJT, for common base configuration the input characteristics are represented by a plot between which of the following parameters?

a) V BE and I E

b) V BE and I B

c) V CE and I C

d) V CC and I C

Answer: a

Explanation: The input signal is applied between the base and the emitter terminals. Input current flowing is the base current and hence characteristics are represented by a plot between V BE and I B .

2. For a BJT, for common base configuration the output characteristics are represented by a plot between which of the following parameters?

a) V BE and I B

b) V CE and I C

c) V CB and I C

d) V CE and I B

Answer: c

Explanation: The input signal is applied between the collector and the emitter terminals. Input current flowing is the collector current and hence characteristics are represented by a plot between V CE and I C .

3. In a BJT, if the collector-base junction is reverse-biased and the base-emitter junction is forward-biased, which region is the BJT operating in?

a) Saturation region

b) Active region

c) Cutoff region

d) Reverse active region

Answer: b

Explanation: If the collector-base junction is reverse-biased and the base-emitter junction is forward-biased, then the BJT functions in the active region of the output characteristics.

4. In a BJT, if the collector-base junction is forward-biased and the base-emitter junction is forward-biased, which region is the BJT operating in?

a) Saturation region

b) Active region

c) Cutoff region

d) Reverse active region

Answer: a

Explanation: If the collector-base junction and the base-emitter junction are both forward-biased, then the BJT functions in the saturation region of the output characteristics.

5. In a BJT, if the collector-base junction and the base-emitter junction are both reverse-biased, which region is the BJT operating in?

a) Saturation region

b) Active region

c) Cutoff region

d) Reverse active region

Answer: c

Explanation: If the collector-base junction and the base-emitter junction are both reverse-biased, then the BJT functions in the cutoff region of the output characteristics.

6. From the given characteristics, what is the approximate value of I C at I B =30 uA and V CE =10 V?

analog-electronic-circuits-questions-answers-bjt-configuration-q6

a) 3 mA

b) 3.4 mA

c) 0 mA

d) 2 mA

Answer: b

Explanation: At the intersection of I B =30 uA and V CE =10 V, I C =3.4 mA.

7. From the given characteristics, what is the approximate value of I C at V BE =0.7 V and V CE =15 V?

analog-electronic-circuits-questions-answers-bjt-configuration-q6

a) 3.4 mA

b) 0 mA

c) 2.5 mA

d) 10 mA

Answer: c

Explanation: From the characteristics, the value of I B at V BE =0.7V is 20uA. Now, from I B =20 uA, we get I C = 2.5 mA.

8. Which of the following correctly determines the relation between α and β?

a) β=α/

b) α=β/

c) β=α/

d) β=α*

Answer: a

Explanation: α and β are related as β=α/.

In a BJT, β = I C /I B . and α = I C /I E

β = αI E /I B = α

β = α + αβ

β = α/1-α.

9. The value of I C is precisely zero when the value of I E is zero.

a) True

b) False

Answer: b

Explanation: When the value of I E is zero, then the value of I C is equal to I CBO which is in the order of microamperes but not zero.

10. For common emitter configuration, which of the following is the correct relation?

a) I C < I E

b) I C = βI B

c) I C = αI E

d) I C = I E

Answer: d

Explanation: All the relations hold true i.e. I C = βI B and I C = αI E . As α<1, hence I C < I E .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “BJT Construction and Operation”.

1. Which of the following is not a valid type of BJT?

a) PNP

b) NPN

c) PPN

d) NNP

Answer: c

Explanation: A BJT is a device with a layer of semiconductor sandwiched between 2 unlike types of semiconductors and hence, PPN is not a valid type of a BJT.

2. In a BJT, the outer layers are much more thick as compared to the middle layer.

a) True

b) False

Answer: a

Explanation: In a BJT, the thickness of the middle layer or the base is thin as compared to the collector and emitter.

3. In a BJT, which of the following layers is heavily doped?

a) Collector

b) Emitter

c) Base

d) Electron

Answer: b

Explanation: The emitter is the most heavily doped and contains the maximum amount of charge carriers. It is the emitter’s task to inject carriers into the base. These bases are thin and lightly doped. For npn B JT, emitter injects electrons, and for pnp, it injects holes.

4. Considering the resistances of emitter, collector and base to be R e , R c and R b respectively, which of the following is the correct statements?

a) R e > R b > R c

b) R c > R b > R e

c) R b > R c > R e

d) R b = R c > R e

Answer: c

Explanation: As the base is lightly doped, the number of free charge carriers are less and hence the resistance is high and as the emitter is the most highly doped, its resistance is low.

5. In a pnp-BJT, when the E-B junction is forward biased and no voltage is applied across C-B junction, what happens to the width of the depletion region in the E-B junction?

a) Increases

b) Decreases

c) Remains same

d) Can’t be determined

Answer: b

Explanation: On application of a forward bias voltage across E-B junction, the width of the depletion region decreases.

6. Which of the following statements is true about proper functioning of a BJT?

a) One junction is forward biased and one is reverse biased

b) Both junctions are forward biased

c) Both junctions are reverse biased

d) Can’t be determined

Answer: a

Explanation: In a BJT, depending upon the biasing of the two junctions, the BJT behaves differently. The BJT may be in saturation, wherein it acts like a short circuit, or it may be in cut-off, i.e an open circuit. The BJT can be either in forward active or reverse active mode. Active mode is the common mode, used in BJTs and obtained by one forward biased and one reverse biased junction.

7. What is the typical order of magnitude of the base current for a BJT?

a) 10 -8

b) 10 -9

c) 10 -6

d) 10 -3

Answer: c

Explanation: As the base current is quite lower as compared to the collector and emitter current, it is usually in the order of microamperes.

8. The collector current in a BJT is temparature-independent.

a) True

b) False

Answer: a

Explanation: The collector current I C in a BJT is made up of two components – one due to majority carriers and the other due to minority carriers. The component of I C due to minority carriers i.e I CO is temparature sensitive.

9. Which of the following currents in a BJT is also called leakage current?

a) I C

b) I E

c) I CO

d) I CBO

Answer: a

Explanation: Leakage current in BJT is represented by I CO , which is due to the flow of minority carriers in the transistor. It consists of I CBO and I CEO . I CO depends on temperature, doubling with 10° rise in temperature. It thus effects total collector current, I C , and hence affects the power dissipation.

10. Which of the following relations are correct?

a) I E + I B = I C

b) I C + I B = I E

c) I E + I C = I B

d) I B + I E = I B

Answer: b

Explanation: On applying KCL to the BJT, we get I C + I B = I E .

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Limits of Operation”.

1. For a BJT, what is typically the shape of the power dissipation curve, if it’s plotted on the output characteristics?

a) Parabola

b) Linear

c) Hyperbola

d) Circular

Answer: c

Explanation: Power Dissipation in a BJT is given by P=V CE .I C . This is in the form of k=xy which is the equation of a hyperbola.

2. What is the region on the output characteristics below I C = I CEO line called?

a) Active region

b) Cutoff region

c) Saturation region

d) Active & Saturation region

Answer: b

Explanation: The region below I C = I CEO is called the cutoff region.

3. What is the region on the output characteristics for V CE < V CE sat called?

a) Active region

b) Cutoff region

c) Saturation region

d) Active & Cutoff region

Answer: c

Explanation: The region below V CE < V CE sat is called the saturation region.

4. From the given characteristics, the value of V CE sat is closest to which of the following values?

analog-electronic-circuits-questions-answers-bjt-limits-operation-q4

a) 0.3 V

b) 1 V

c) 5 V

d) 20V

Answer: a

Explanation: From the given characteristics, the saturation voltage is obtained through the V CE vs I C graph where in the approximate saturation region is the area where the dotted vertical line near to the origin is present. Hence we can estimate the value of V Sat to be that of 0.3V.

5. Given that the collector power dissipation is 300 mW, what is the value of collector current for the collector to emitter voltage = 12 V?

a) 50 mA

b) 0 mA

c) 25 mA

d) 100 mA

Answer: b

Explanation: P = V CE .I C = > 300mW = I C = > I C =300/12 mA = 25 mA.

6. Given that the collector power dissipation is 300 mW, what is the value of collector to emitter voltage for collector current = 50 mA?

a) 6 V

b) 3 V

c) 0 V

d) 2 v

Answer: a

Explanation: P = V CE .I C = > 300mW = V CE = > V CE = 300/50 = 6 V.

7. From the given curve tracer response, what is the value of β for I C = 7 mA and V CE = 5 V?

analog-electronic-circuits-questions-answers-bjt-limits-operation-q7

a) 150

b) 180

c) 250

d) 120

Answer: b

Explanation: From the curve, we get change in I C = mA and change in I B = 10 uA. Hence, I C /beta; = = 180.

8. If the positive lead of a DMM, with the mode set to ohmmeter is connected to the base and the negative lead to the emitter and a low resistance reading is obtained, then what is the type of transistor that is being tested?

a) NPN

b) PNP

c) Faulty transistor

d) Not a transistor, it is a FET

Answer: a

Explanation: There are multiple ways to test the BJT to be npn or pnp using a DMM based upon which terminals are connected to which lead of the DMM. If positive is to base and negative to the emitter of the BJT, and if a low reading is obtained and not a over limit, then the transistor is NPN.

9. If the positive lead of a DMM, with the mode set to ohmmeter is connected to the base and the negative lead to the emitter and a high resistance reading is obtained, then what is the type of transistor that is being tested?

a) npn

b) pnp

c) faulty

d) not a transistor, it is a FET

Answer: a

Explanation: If the positive lead of a DMM, with the mode set to ohmmeter is connected to the base and the negative lead to the emitter and a low resistance reading is obtained, then what is the type of transistor that is being tested is npn.

10. For the given transistor, what is the correct sequence of the pins from left to right?

analog-electronic-circuits-questions-answers-bjt-limits-operation-q10

a) ECB

b) BCE

c) CEB

d) CBE

Answer: d

Explanation: With the curved side facing us, the answer can either be collector-base-emistter, left to right, or emitter-base-collector. Hence the correct option is CBE, and that applies for an NPN transistor.

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “BJT DC biasing – Fixed Bias and Emitter Bias”.

1. Which of the following is the correct relationship between base and emitter current of a BJT?

a) I B = β I E

b) I B = I E

c) I B = I E

d) I E = I B

Answer: d

Explanation: For a BJT, the collector current I C = βI B and I E = I C + I B

Hence, I E = I B .

2. For best operation of a BJT, which region must the operating point be set at?

a) Active region

b) Cutoff region

c) Saturation region

d) Reverse active region

Answer: a

Explanation: Operating point for a BJT must always be set in the active region to ensure proper functioning. Setting up of Q-point in any other region may lead to reduced functionality.

3. From the given circuit, using a silicon transistor, what is the value of I B Q ?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q3

a) 47.08 mA

b) 47.08 uA

c) 50 uA

d) 0 mA

Answer: b

Explanation: Consider the BJT to be in saturation. Then I C =12-0.2/2.2k=5.36 mA

And I B =12-0.8/240k=0.047 mA

I BMIN =I CSAT /β=5.09/50=0.1072mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =12-0.7/240=47.08μA

4. From the given circuit, using a silicon BJT, what is the value of V CE Q ?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q3

a) 7 V

b) 0.7 V

c) 6.83 V

d) 7.17 V

Answer: c

Explanation: Consider the BJT to be in saturation. Then I C =12-0.2/2.2k=5.36 mA

And I B =12-0.8/240k=0.047 mA

I BMIN =I CSAT /β=5.09/50=0.1072mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =12-0.7/240=47.08μA

I C =50×47.08=2.354 mA

V CE =V CC -I C R C =12-2.354*2.2=12-5.178=6.83V.

5. From the given circuit, using a silicon BJT, what is the value of V BC ?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q3

a) 6.13 V

b) -6.13 V

c) 7 V

d) -7 V

Answer: b

Explanation: Consider the BJT to be in saturation. Then I C =12-0.2/2.2k=5.36 mA

And I B =12-0.8/240k=0.047 mA

I BMIN =I CSAT /β=5.09/50=0.1072mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =12-0.7/240=47.08μA

I C =50×47.08=2.354 mA

V CE =V CC -I C R C =12-2.354*2.2=12-5.178=6.83V

Hence V BC = 0.7-6.83 = -6.13V.

6. From the given circuit, using silicon BJT, what is the value of the saturation collector current?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q3

a) 5 mA

b) 5.36 mA

c) 5.45 mA

d) 10.9 mA

Answer: b

Explanation: To obtain an approximate answer, under saturation the BJT is ON and hence acts as a short circuit. However, ideally a drop exists for the transistor which is a fixed value. For an exact answer, if the BJT is a Silicon transistor, then drop V CE = 0.2V and current is 12-0.2/2.2=5.36 mA.

7. In the given circuit, what is the value of I C if the BJT is made of Silicon?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q7

a) 2.01 mA

b) 2.01 uA

c) 10.05 mA

d) 10.05 uA

Answer: a

Explanation: Consider the BJT to be in saturation. Then I C =20-0.2/2k=9.9 mA

And I B =20-0.8/430k=0.044 mA

I BMIN =I CSAT /β=5.09/50=0.198mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =20-0.7/430=44.88μA

I C =50×44.88=2.24 mA.

8. In the given circuit, using a silicon BJT, what is the value of V CE ?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q7

a) 20 V

b) 15.52 V

c) 14.98 V

d) 13.97 V

Answer: b

Explanation: Consider the BJT to be in saturation. Then I C =20-0.2/2k=9.9 mA

And I B =20-0.8/430k=0.044 mA

I BMIN =I CSAT /β=5.09/50=0.198mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =20-0.7/430=44.88μA

I C =50×44.88=2.24 mA

V CE =20-2.24*2=15.52V.

9. In the given circuit, what is the value of V E when using a silicon BJT?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q7

a) 2.01 V

b) 0.28 V

c) 0 V

d) 2.28 V

Answer: d

Explanation: Consider the BJT to be in saturation. Then I C =20-0.2/2k=9.9 mA

And I B =20-0.8/430k=0.044 mA

I BMIN =I CSAT /β=5.09/50=0.198mA which is greater than above I B .

Hence transistor is in the active region.

Thus I C =βI B .

V BE =0.7V

I B =20-0.7/430=44.88μA

I C =50×44.88=2.24 mA

V CE =20-2.24*2=15.52V

V E =I E R E =I B R E =51*44.88*1=2.28V.

10. In the given circuit using a silicon BJT, what is the value of saturation collector current?

analog-electronic-circuits-questions-answers-bjt-dc-biasing-fixed-emitter-q7

a) 10 mA

b) 8.77 mA

c) 6.67 mA

d) 5 mA

Answer: c

This set of Analog Circuits Multiple Choice Questions & Answers focuses on “Voltage Regulators – 1”.

1. What is IC 723?

a) A voltage regulator

b) A full-wave rectifier

c) A half-wave rectifier

d) A clipper

Answer: a

Explanation: The IC 723 is a voltage regulator, which can act as both a low voltage regulator as well as a high voltage regulator. Output can be set between 7-37 volts. 7 volts is the reference starting voltage.

2. Consider the circuit shown below where the breakdown voltage of the diode is 5V. Source voltage varies between 6V to 12V.

analog-circuits-questions-answers-voltage-regulators-1-q2

Find the maximum current through the R2, given that R1=2kΩ and R2=5kΩ.

a) 3.5 mA

b) 1 mA

c) 1.4mA

d) 0.2 mA

Answer: c

Explanation: Source current is I = V S -V Z /R 2

Thus here I is maximum when V S is maximum.

I = 12-5/5000 = 1.4 mA.

3. For a Zener diode shunt regulator, the source current is I S , the Zener diode current is I Z and the load current is I L . The source voltage is V S , Zener voltage is V Z and load voltage is V L . The load resistance is R L . What is the correct option for the safe operation of the diode?

a) I S = I Z + I L

b) I S =< I Zmax + I L

c) I S =< I Zmin + I L

d) V L = V Z

Answer: b

Explanation: For proper operation, the current through RS should be at least equal to the sum of I Zmin a specified load current. I S >= IZ min + I L

For safe operation of the diode, I S =< I Zmax + I L .

4. What is line regulation?

a) The process of keeping Zener diode voltage constant inspite of changes in AC supply

b) The process of keeping load voltage constant irrespective of the fluctuation in AC supply or the line voltage

c) The process of keeping load voltage constant irrespective of fluctuation in load current

d) The process of keeping Zener current constant irrespective of fluctuation in AC supply

Answer: b

Explanation: Line regulation is the process of keeping the load voltage constant, irrespective of fluctuation in AC supply or the line voltage. In line regulation, the load current is considered constant.

5. What is load regulation?

a) The process of keeping the load voltage constant irrespective of any change in AC supply

b) The process of keeping the load voltage constant irrespective of variations in load current

c) The process of keeping load voltage constant irrespective of variations in source current

d) The process of keeping load current constant irrespective of variations in AC supply

Answer: b

Explanation: Load regulation is the process of keeping V O constant irrespective of variations in load current. The line voltage is taken to be constant during load regulation.

6. Find the power rating of the diode in the given circuit. The breakdown voltage of the diode is 5V.

analog-circuits-questions-answers-voltage-regulators-1-q6

a) 200 mW

b) 125 mW

c) 250 mW

d) 300 mW

Answer: c

Explanation: Source current I S = 15-5/200 = 0.05A = 50 mA

The power rating of the diode is the maximum power it can dissipate which occurs when the load is disconnected because then the whole current flows into the diode.

Hence maximum power rating is P = V Z xI Z = 5×50 = 250 mW.

7. The following circuit is provided.

analog-circuits-questions-answers-voltage-regulators-1-q7

Given that V1 varies from 20V to 50V, the diode breakdown voltage is 5V, the knee current is 1mA and the current is 9 mA across R1, find the maximum value of R2.

a) 4500Ω

b) 1500Ω

c) 2000Ω

d) 5000Ω

Answer: b

Explanation: I S >= I Zmin + I L

I S >= 10mA

V1-5/R2 >= 10mA

R2 =< V1-5/10 -2

Thus R2 =< 1500Ω when V1 = 20V

And R2 =< 4500Ω when V1 = 50V

Hence R2 =< 1500Ω.

8. In the figure below, the voltage V1 ranges from 15 to 35V. The load current is 20mA. The diode knee current is 2 mA, the breakdown voltage is 5V and power rating is 200 mW.

analog-circuits-questions-answers-voltage-regulators-1-q7

Calculate the range of R2 for the circuit to behave properly as a regulator.

a) 400Ω =< R2 =< 500Ω

b) 450Ω =< R2 =< 500Ω

c) 454Ω =< R2 =< 500Ω

d) 454Ω =< R2 =< 600Ω

Answer: c

Explanation: I S >= I L + I Zmin

I S >= 22mA

I Zmax = 200mW/5 = 40 mA.

V1 is minimum, I S >= I Zmin + I L

V1-5/R2 >= 22mA

R2 <= 454 Ω

I S =< I Zmax + I L when V S is maximum

V1-5/R2 =< 60mA

R2 >= 500 Ω

Hence 454Ω =< R2 =< 500Ω.

9. Which of these is a not drawback of Zener diode shunt regulator?

a) The output voltage is fixed

b) The output voltage can vary with temperature

c) Variation in load current needs to be minimal

d) It is difficult to design

Answer: d

Explanation: The Zener diode shunt regulator is a simple voltage regulator circuit that provides a fixed output voltage. However, due to the presence of the Zener diode, the output is temperature dependent because the breakdown voltage of Zener diode depends on temperature. When load current varies a lot, then Zener current also varies which causes a change in output voltage.

This set of Analog Circuits Objective Questions & Answers focuses on “Voltage Regulators – 2”.

1. In a power supply, the output voltage can vary due to multiple reasons. Which of these is not true if it is found that the output voltage is constant?

a) The voltage stability factor is very high

b) The output resistance is zero

c) The temperature coefficient is zero

d) The voltage stability factor is very small

Answer: a

Explanation: In a power supply, the output voltage can vary due to changes in AC supply, load current and the temperature.

V O = f(V S , I L ,T)

ΔV O = S V .ΔV S + R O ΔI L + S T ΔT.

2. Consider the op-amp circuit shown.

analog-circuits-objective-questions-answers-q2

The breakdown voltage of the Zener is 5V. β for the transistor is 100. R1=10kΩ, R2=90kΩ, R3=30kΩ, R4=50kΩ. Calculate the total output voltage.

a) 20V

b) 30V

c) 5V

d) 50V

Answer: a

Explanation: V O = V Z = 5 = 5×4

V O = 20V.

3. Consider the following circuit. Find the power dissipation of the transistor given that the diode breakdown voltage is 5V, R1=20kΩ, R2=100kΩ, R3=200kΩ, R4=10Ω. The source voltage V S =20V.

analog-circuits-objective-questions-answers-q2

a) 12.12W

b) 9.375W

c) 9.27W

d) 10.575W

Answer: b

Explanation: Power dissipation = V CE x I C

V CE = V C – V E = V S – V OUT = 20-5 = 20-5×3/2 = 20-7.5 = 12.5V

I C ≈ I E = load current, since R2 and R3 are greater than the load, so most current flows through the load.

I L = V OUT /10 = 0.75A

P = 12.5 x 0.75 = 9.375W.

4. In the Zener controlled series regulator shown below, find the current through the Zener diode.

analog-circuits-objective-questions-answers-q4

Given that the Zener diode breakdown voltage is 5V, the source voltage is 15V, the output voltage is 10V, R4 = 2kΩ, β=99, R1=2kΩ.

a) 5.05 mA

b) 4.95 mA

c) 3.33 mA

d) 0

Answer: b

Explanation: I E = I L = I B

I B = 10/100×2000 = 0.05 mA

Current through R1 = I B + I Z = I 1

I Z = I 1 -I B = 15-5/2k – 0.05 = 5 – 0.05 = 4.95mA.

5. Consider the circuit shown and find the percentage increase in power dissipation of the transistor if the source voltage increases by 10%.

analog-circuits-objective-questions-answers-q2

Given that the breakdown voltage is 5V, R1=10kΩ, R2=100kΩ, R3=200kΩ, R4=10Ω. The source voltage V S =25V.

a) 10%

b) 20.22%

c) 14.28%

d) 15.66%

Answer: c

Explanation: Originally, V CE = 25-5 x 3/2 = 17.5V

I C = 7.5/10 = 0.75A

V OUT and I C do not change, only V CE changes.

10% increase in V S means now V S = 110/100 * 25 = 27.5V

V CE = 20V

Power initially P1 = 17.5 x 0.75 = 13.125W

Power finally P2 = 20 * 0.75 = 15W

Power increase % = 15-13.125/13.125*100 = 14.28%.

6. The following is a shunt regulator. Find maximum power dissipation of the Zener diode and transistor, given that the source voltage varies from 20-40V, the Zener breakdown voltage is 5V, the output voltage is 10V, the resistance R1=50Ω, R2=20kΩ, β=99, V BE =0.5V.

analog-circuits-objective-questions-answers-q6

a) P Transistor = 5.12 W, P Zener = 0.051 W

b) P Transistor = 0.41 W, P Zener = 0.57 W

c) P Transistor = 5.94 W, P Zener = 0.057 W

d) P Transistor = 6.22 W, P Zener = 5.66 W

Answer: c

Explanation: Output voltage = 10V = V CE

Current across R1 = V S -V O /R1

For maximum power dissipation, supply is maximum

I = 40-10/50 = 0.6A

Current I = I Z + I C = I B + βI B = 100I B

I B = 6mA

I C = 0.594 A

P Transistor = 10*0.594 = 5.94 W

P Zener = 10-0.5 * 6mA = 57mA = 0.057 W.

7. What is not related to a transistorized series regulator?

a) The output can be varied by using a variable resistor

b) The output is independent of temperature

c) The overload and short circuit protection is not required

d) The circuit has negative feedback responsible for regulation

Answer: c

Explanation: In a transistorized series regulator, the Zener diode maintains emitter voltage. An increase in output is canceled by a decrease in the output. The circuit has negative feedback for this regulation. The output may be varied by using a variable resistor and change in output due to temperature due to the Zener diode is canceled by the change in VBE of the transistor. However, when the load is reduced, or an accidental short-circuit occurs, overload and a short circuit occurs, and protection is needed to prevent that.

8. In a transistorized series regulator, how is the overload and short-circuit protection provided?

a) By the use of a thermistor

b) By using two additional diodes and a current sensing resistor to protect the series transistor

c) By using a diode and an additional resistor to protect the transistor

d) By using a diode along with a capacitor of a small capacitance value in series

Answer: b

Explanation: Series transistor can be protected by connecting two additional diodes and a current sensing resistor to the circuit. When the load current is smaller, the diode is off and load current is through the transistor and the new resistor. When the load current increases, the voltage drop across the new resistor increases and soon the diodes start conduction. A limiting current flows through the transistor.

9. What is the output of the IC 7924?

a) 12V

b) -12V

c) 24V

d) -24V

Answer: d

Explanation: The IC of series 78xx and 79xx are fixed voltage regulators, wherein the 78 represents those with a positive output and 79 is for those with a negative output. The xx value represents the magnitude of the output voltage being achieved. For proper operation, the input voltage should be at least 2V greater than the output voltage.

10. In the IC 7805, what is the minimum input voltage for proper functioning?

a) 5V

b) 6V

c) 7V

d) 8V

Answer: c

Explanation: For a fixed voltage IC regulator, the input voltage should be at least 2V greater than the output voltage. A minimum voltage of 2V should be allowed to drop in the internal circuit of the IC.